Optimizing space and time of operations for register configurations

A system, comprising:

• one or more processors coupled with memory, configured to:
• obtain a first sequence of write operations to configure a device, each write operation in the first sequence of write operations identifying a set of a first value and a first address to which to write the first value;
• identify a unique address corresponding to the first address across at least a subset of write operations of the first sequence of write operations;
• determine a second address based at least on the unique address corresponding to the first address;
• assign the second address to the first address across at least the subset of write operations of the first sequence of write sequences to generate a second sequence of write operations;
• and
• cause the device to be configured using the second sequence of write operations.

A non-transitory computer readable medium storing program instructions for causing one or more processors to:

• obtain a first sequence of write operations to configure a device, each write operation in the first sequence of write operations identifying a set of a first value and a first address to which to write the first value;
• identify a unique address corresponding to the first address across at least a subset of write operations of the first sequence of write operations;
• determine a second address based at least on the unique address corresponding to the first address;
• assign the second address to the first address across at least the subset of write operations of the first sequence of write sequences to generate a second sequence of write operations;
• and
• cause the device to be configured using the second sequence of write operations.