Fault detection
AssigneeNVIDIA Corporation
InventorsPhilip Nelson Elcan, Jason Sequeira, Daniel Jonathan Hettena, William Joseph Armstrong, Aingarathasan Paramakuru, Thomas Fleury
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AssigneeNVIDIA Corporation
InventorsPhilip Nelson Elcan, Jason Sequeira, Daniel Jonathan Hettena, William Joseph Armstrong, Aingarathasan Paramakuru, Thomas Fleury
Estimating the term…
Apparatuses, systems, and techniques for testing processing units of a computing system are disclosed herein. A request to initiate a testing process for each of a set of processing units is received. A first processing unit includes a first virtual processor executing first operations. A second processing unit includes a second virtual processor executing second operations. Execution of the first operations is transferred from the first virtual processor to the second virtual processor. Execution of the testing process is initiated at the first processing unit while the second virtual processor executes the first and second operations. In response to a detection that the execution of the testing process is completed, execution of the first and second operations is transferred to the first virtual processor. Execution of the testing process is initiated at the second processing unit while the first virtual processor running executes the first and second operations.
A method comprising:
A system comprising:
A processor comprising:
Dependencies are inferred from the claim text.