Apparatus and methods for generation of an intermediate representation for artificial intelligence centric architectures

A system for compilation of an upper level computer language into a control graph intermediate representation, the system comprises:

• a processing circuitry communicatively connected to a storage;
• a memory connected to the processing circuitry, wherein the memory contains therein instructions that when executed by the processing circuitry cause the system to:
• receive an input in an upper-level computer language;
• generate for the received input a plurality of sub-graphs, wherein each sub graph comprises an input control node connected by a first edge to a first body sub-graph and the first body sub-graph is connected by a second edge to a output control node, and wherein the plurality of sub-graphs are connected via respective edges to form an initial intermediate representation of the control graph, wherein a control node encapsulates logic to decide on a next compute node to execute and to enqueue job requests into an input queue of a compute device to execute the next compute node;
• optimize the initial intermediate representation by at least merging a first output control node connected by an edge to a second control node, thereby creating an optimized control graph intermediate representation;
• and
• store the optimized control graph intermediate representation in the storage;
• wherein a first sub-graph of the plurality of sub-graphs further comprises at least one compute node and a second sub-graph of the plurality of sub-graphs further comprises at least one compute node;
• wherein the at least one compute node of the first sub-graph of the plurality of sub-graphs uses a different shared-memory address space than the at least one compute node of the second sub-graph of the plurality of sub-graphs.

A non-transitory computer readable medium having stored thereon instructions for causing a processing circuitry to execute a process, the process comprising:

• receiving an input in an upper-level computer language;
• generating for the received input a plurality of sub-graphs, wherein each sub graph comprises an input control node connected by a first edge to a first body sub-graph and the first body sub-graph is connected by a second edge to a output control node, and wherein the plurality of sub-graphs are connected via respective edges to form an initial intermediate representation of the control graph, wherein a control node encapsulates logic to decide on a next compute node to execute and to enqueue job requests into an input queue of a compute device to execute the next compute node;
• optimizing the initial intermediate representation by at least merging a first output control node connected by an edge to a second control node, thereby creating an optimized control graph intermediate representation;
• and,
• storing the optimized control graph intermediate representation in a storage;
• wherein a first sub-graph of the plurality of sub-graphs further comprises at least one compute node and a second sub-graph of the plurality of sub-graphs further comprises at least one compute node;
• wherein the at least one compute node of the first sub-graph of the plurality of sub-graphs uses a different shared-memory address space than the at least one compute node of the second sub-graph of the plurality of sub-graphs.