Apparatus, a method of operating modulo k calculation circuitry and a non-transitory computer-readable medium to store computer-readable code for fabrication of an apparatus

A method of operating modulo k calculation circuitry comprising a plurality of combination stages, each combination stage arranged to replace one or more groups of input modulo k values with one or more combined modulo k values, each combined modulo k value providing a modulo k value derived from a sum of an associated group of input modulo k values, thereby generating a reduced plurality of modulo k values, the method comprising:

• decomposing an input data value into a plurality of partial operands, wherein a sum of the plurality of partial operands is equal to the input data value, and determining a plurality of modulo k values comprising a modulo k value derived from each of the plurality of partial operands;
• with a first combination stage, receiving the plurality of modulo k values as inputs and outputting an intermediate reduced plurality of modulo k values;
• and
• with one or more further combination stages, sequentially combining one or more groups of the intermediate reduced plurality of modulo k values to generate an output modulo k value of the input data value.

A non-transitory computer-readable medium to store computer-readable code for fabrication of an apparatus comprising:

• input data value analysis circuitry configured to decompose an input data value into a plurality of partial operands, wherein a sum of the plurality of partial operands is equal to the input data value, and to determine a plurality of modulo k values comprising a modulo k value derived from each of the plurality of partial operands;
• and
• modulo k calculation circuitry comprising a plurality of combination stages, each combination stage arranged to replace one or more groups of input modulo k values with one or more combined modulo k values, each combined modulo k value providing a modulo k value derived from a sum of an associated group of input modulo k values, thereby generating a reduced plurality of modulo k values,
• wherein the plurality of combination stages comprises a first combination stage configured to receive the plurality of modulo k values as inputs and to output an intermediate reduced plurality of modulo k values, and one or more further combination stages arranged to sequentially combine one or more groups of the intermediate reduced plurality of modulo k values to generate an output modulo k value of the input data value.