Compute-in-memory systems and methods with configurable input and summing units

A memory device, comprising:

• a memory array that includes memory cells, control circuits connected to bit lines of the memory cells, and multiplexers connected to the control circuits;
• and
• compute-in-memory circuits situated under the memory array and in the memory device and electrically coupled to the memory array, the compute-in-memory circuits including:
• a multiplication circuit that has an input terminal and includes multiple multiply circuits that receive data through the input terminal and that receive weights from the memory array through the multiplexers for N convolution layers, where N is a positive integer, the multiple multiply circuits interact the data with the weights to provide interacted results;
• a programmable summing circuit that is programmed by a data pattern that corresponds to a convolution layer of the N convolution layers to set a number of inputs, a number of adders, and a number of outputs for the convolution layer during operation of the compute-in-memory circuits, wherein each of the N convolution lavers has a corresponding data pattern to set the number of inputs, the number of adders, and the number of outputs for that convolution layer, the programmable summing circuit sums the interacted results and provides summed result;
• a pooling unit that pools a programmable summing circuit result that is based on the summed result and provides a pooled result;
• and
• a buffer that feeds the pooled result back to the multiplication circuit to compute a next one of the N convolution layers, wherein the buffer outputs a result after all N convolution layers have been completed.

A method, comprising:

• reading weights from a memory array through multiplexers electrically coupled to bit lines of memory cells in the memory array, the weights for N convolution layers, wherein N is a positive integer;
• multiplying by compute-in-memory circuits that are situated under the memory array and electrically coupled to the memory array, the compute-in-memory circuits including a multiplication circuit that has an input terminal and includes multiple multiply circuits that receive data through the input terminal and that receive the weights from the memory array through the multiplexers, the multiple multiply circuits multiplying the data with the weights to provide interacted results;
• programming a programmable summing circuit that is part of the compute-in-memory circuits with a data pattern that corresponds to a convolution layer of the N convolution layers to set a number of inputs, a number of adders, and a number of outputs for the convolution layer during operation of the computer-in-memory circuits, wherein each of the N convolution layers has a corresponding data pattern that sets the number of inputs, the number of adders, and the number of outputs for that convolution layer;
• and
• adding the interacted results by the programmabl summing circuit to provide a sum output.