Reducing read latency based on logical translation unit mismatch statuses

A method comprising:

• receiving, from a high-speed processing device of a plurality of high-speed processing devices, a command to perform a memory access operation on a logical block address (LBA) associated with a blockstripe of a plurality of blockstripes, each blockstripe comprising at least one block from each memory device of a plurality of memory devices;
• in response to receiving the command, reading, from a memory device of the plurality of memory devices, data associated with a plurality of LBAs, the plurality of LBAs comprising the LBA;
• storing the data associated with the plurality of LBAs in a data segment;
• determining a status of each LBA of the plurality of LBAs associated with the data segment;
• responsive to determining that one or more LBAs of the plurality of LBAs associated with the data segment correspond to a logical translation unit (LTU) mismatch status, providing data associated with the one or more LBAs to the high-speed processing device;
• receiving, from the high-speed processing device, an updated data segment comprising data corresponding to the LBA;
• and
• performing the memory access operation on the memory device using the updated data segment.

A non-transitory computer readable storage medium comprising instructions that, when executed by a plurality of channel cores, cause the plurality of channel cores to perform operations comprising:

• receiving, from a high-speed processing device of a plurality of high-speed processing devices, a command to perform a memory access operation on a logical block address (LBA) associated with a blockstripe of a plurality of blockstripes, each blockstripe comprising at least one block from each memory device of a plurality of memory devices;
• in response to receiving the command, reading, from a memory device of the plurality of memory devices, data associated with a plurality of LBAs, the plurality of LBAs comprising the LBA;
• storing the data associated with the plurality of LBAs in a data segment;
• determining a status of each LBA of the plurality of LBAs associated with the data segment;
• responsive to determining that one or more LBAs of the plurality of LBAs associated with the data segment correspond to a logical translation unit (LTU) mismatch status, providing data associated with the one or more LBAs to the high-speed processing device;
• receiving, from the high-speed processing device, an updated data segment comprising data corresponding to the LBA;
• and
• performing the memory access operation on the memory device using the updated data segment.