Security architecture for out-of-band manageability in heterogeneous computing platforms
AssigneeDell Products L.P.
InventorsAdolfo S. Montero, Abeye Teshome, Alok Pant
Life of this patent
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Abstract
Systems and methods for a security architecture for Out-of-Band (OOB) manageability in heterogeneous computing platforms. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform and an OOB Microcontroller Unit (MCU) integrated into the heterogeneous computing platform, where the OOB MCU is configured to receive a command and transmit the command or an indication of the command to a crypto device via an interconnect while a host processor is in a low-power state.
Claims13
An Information Handling System (IHS), comprising:
- a heterogeneous computing platform, wherein the heterogeneous computing platform comprises a host processor and a plurality of devices coupled to an interconnect, and wherein the IHS is configured to operate the host processor and the plurality of devices in a plurality of power states, including:
- a full power working state;
- and
- a low-power Advanced Configuration and Power Interface (ACPI) G3 state;
- an Out-of-Band (OOB) Microcontroller Unit (MCU) integrated into the heterogeneous computing platform, wherein the OOB MCU is configured to:
- periodically check for commands while the IHS is operating in the low-power ACPI G3 state;
- receive a command while the IHS is operating in the low-power ACPI G3 state;
- and
- in response to the received command, transmit the command or an indication of the command to a crypto device via the interconnect while the IHS is operating in the low-power ACPI G3 state, causing the crypto device to exit the low-power ACPI G3 state to perform one or more operations;
- and
- cause the crypto device to return to the low-power ACPI G3 state after completing the one or more operations.
An Out-of-Band (OOB) Microcontroller Unit (MCU) integrated into a heterogeneous computing platform of an Information Handling System (IHS), the OOB MCU comprising:
- a processing core distinct from any host processor of the heterogeneous computing platform;
- and
- a memory coupled to the processing core, the memory having program instructions stored thereon that, upon execution by the processing core, cause the OOB MCU to:
- periodically check for commands while the heterogeneous computing platform is operating in a low-power Advanced Configuration and Power Interface (ACPI) G3 state;
- receive an Out-of-Band (OOB) command, by an OOB Microcontroller Unit (MCU) integrated into a heterogenous computing platform, while every host processor of the heterogenous computing platform is in the low-power ACPI G3 state;
- in response to the received OOB command, select a first crypto device internal to the OOB MCU or a second crypto device external to the OOB MCU and integrated into the heterogeneous computing platform;
- and
- in response to selecting the second crypto device, transmit the command or an indication of the command to the second crypto device via the interconnect while every host processor of the heterogenous computing platform is in the low-power ACPI G3 state.
Dependencies are inferred from the claim text.