Bandgap current reference
AssigneeTexas Instruments Incorporated
InventorsBoqiang Xiao, Avinash Shreepathi Bhat
Life of this patent
Estimating the term…
Abstract
A bandgap current reference circuit includes a bandgap core circuit and an error amplifier. The bandgap core circuit is configured to generate a zero temperature coefficient bandgap current. The bandgap core circuit includes a bipolar transistor. The bipolar transistor is configured to pass a current that is proportional to absolute temperature (PTAT current). The error amplifier is coupled to the bandgap core circuit and includes a bipolar differential input pair. The bipolar differential input pair is configured to ensure that the PTAT current is flowing in the bipolar transistor.
Claims23
A circuit, comprising:
- a current source having a control input and an output;
- a bandgap circuit coupled to the output of the current source;
- and
- an error amplifier circuit having a first input and a second input coupled to the bandgap circuit and output coupled to the control input of the current source, the error amplifier circuit including:
- a gain stage circuit having an output coupled to the output of the error amplifier circuit, and first and second inputs;
- and
- an input stage circuit having a first output and a second output coupled to, respectively, the first input and the second input of the gain stage circuit, the input stage circuit including:
- a first transistor including a control terminal coupled to a first input of the error amplifier circuit, a first terminal coupled to the first output, and a second terminal;
- and
- a second transistor including a control terminal coupled to a second input of the error amplifier circuit, a first terminal coupled to the second output, and a second terminal, wherein the second terminal of the second transistor is coupled to the second terminal of the first transistor, wherein the first transistor and the second transistor are bipolar transistors, and wherein a current through the second terminal of the second transistor is larger than a current through the second terminal of the first transistor.
A circuit comprising:
- a bandgap circuit including a first bipolar transistor;
- and
- an error amplifier circuit coupled to the bandgap circuit, the error amplifier circuit including:
- a gain stage circuit;
- and
- a differential input stage circuit coupled to the gain stage circuit, the differential input stage circuit including:
- a first transistor including a control terminal, a first terminal, and a second terminal;
- a second transistor including a control terminal, a first terminal, and a second terminal, wherein the second terminal of the second transistor is coupled to the second terminal of the first transistor wherein the first transistor and the second transistor are bipolar transistors;
- a third transistor including a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is coupled to the control terminal of the second transistor, and the first terminal of the third transistor is coupled to the first terminal of the first transistor;
- and
- a fourth transistor including a control terminal, a first terminal, and a second terminal, wherein the second terminal of the third transistor is coupled to the second terminal of the fourth transistor, the control terminal of the fourth transistor is coupled to the bandgap circuit, and the first terminal of the fourth transistor is coupled to the first terminal of the second transistor, wherein the third and fourth transistors are field effect transistors.
A data acquisition system, comprising:
- a processor;
- a voltage regulator coupled to the processor, the voltage regulator including:
- a bandgap circuit;
- and
- an error amplifier circuit coupled to the bandgap circuit, the error amplifier circuit including:
- a first differential input pair of bipolar transistors configured to be active during steady-state operation of the bandgap circuit wherein the first differential input pair of bipolar transistors includes a first transistor including a first terminal, a second terminal, and a control terminal, and a second transistor including a first terminal, a second terminal, and a control terminal, and wherein the second terminal of the second transistor is coupled to the second terminal of the first transistor;
- and
- a second differential input pair of field effect transistors, wherein the second differential input pair of field effect transistors includes a third transistor including a first terminal, a second terminal, and control terminal, and a fourth transistor including a first terminal, a second terminal, and a control terminal, wherein the second terminal of the third transistor is coupled to the second terminal of the fourth transistor, the control terminal of the fourth transistor is coupled to the bandgap circuit, the first terminal of the fourth transistor is coupled to the first terminal of the second transistor.
Dependencies are inferred from the claim text.