Wafer and prober

A wafer comprising:

• a substrate;
• an element layer provided on the substrate;
• a first insulating layer provided to cover the element layer and including a first region and a second region that do not overlap each other in a plan view;
• a first chip unit and a second chip unit each provided in the element layer, each of the first chip unit and the second chip unit including a memory cell configured to store data in a non-volatile manner;
• a first electrode and a second electrode each electrically connected to the first chip unit;
• and
• a third electrode and a fourth electrode each electrically connected to the second chip unit,
• wherein
• the first chip unit includes a fifth electrode electrically connected to the first electrode,
• the first chip unit includes a sixth electrode electrically connected to the second electrode,
• the second chip unit includes a seventh electrode electrically connected to the third electrode,
• the second chip unit includes an eighth electrode electrically connected to the fourth electrode,
• the first electrode and the third electrode are arranged in the first region,
• the second electrode and the fourth electrode are arranged in the second region,
• first write data transmitted from a host is capable of being transferred through the second electrode and the sixth electrode to be stored in the memory cell of the first chip unit,
• second write data transmitted from the host is capable of being transferred through the fourth electrode and the eighth electrode to be stored in the memory cell of the second chip unit, and
• the second region, in which the second electrode and the fourth electrode are arranged, is, in the plan view, independent of a region in which the first chip unit and the second chip unit are provided.