# US 12,760,410 B2 · Nanoporous GaN on p-type GaN: a mg out-diffusion compensation layer for heavily mg-doped p-type GaN

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- Number: US 12,760,410 B2
- Document ID: US12760410B2
- Status: Granted
- Kind: B2
- Application number: 18/487,543
- Filed: 2023-10-16
- Published: 2024-04-25
- Granted: 2026-10-13
- Earliest claimed: 2022-10-14
- Assignees: The Board of Trustees of the Leland Stanford Junior University
- Applicants: The Board of Trustees of the Leland Stanford Junior University
- Inventors: Srabanti Chowdhury; Kwangjae Lee
- Web page: https://patentgrep.com/patent/US12760410B2

## CPC

- C23C 16/303: {Nitrides}
- C23C 16/0227: {by cleaning or etching}
- C23C 16/045: {Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates}
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)

## Abstract

Improved fabrication is provided for devices in the GaN material system that require an embedded p-type layer. The effect of Mg diffusion from the p-type layer is compensated for using an GaN interlayer that is etched to be nanoporous at its top surface. In addition to serving as a diffusion barrier, the GaN interlayer preferably has C and O impurities from the etch that tend to compensate unwanted Mg doping in layers above the GaN interlayer. Importantly, the entire structure can be grown at high temperatures, which desirably avoids low temperature growth steps that tend to reduce material quality.

## Claims

### Claim 1

A method of compensating effects of Mg diffusion in growth of III-nitride devices, the method comprising:
depositing a first layer of Mg-doped p-type GaN on a device substrate;
depositing a second layer of GaN on the first layer;
etching a top surface of the second layer to make it porous, wherein pores of the second layer do not extend through the second layer; and
depositing one or more additional device layers on the second layer after the etching;
wherein effects of Mg diffusion from the first layer into the one or more additional device layers are compensated by the second layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the etching a top surface of the second layer to make it porous is performed with an electrochemical etch.

### Claim 3 (depends on 2)

The method of claim 2, wherein the electrochemical etch is performed with an applied voltage in a range from 5 V to 20 V, whereby pores formed in the second layer are small enough to be removed by the deposition of the one or more additional device layers.

### Claim 4 (depends on 1)

The method of claim 1, wherein the etching a top surface of the second layer to make it porous introduces C and/or O impurities into the second layer that provide compensatory doping of unintended doping due to Mg diffusion.

### Claim 5 (depends on 1)

The method of claim 1, wherein deposition temperatures of the first layer, the second layer and the one or more additional device layers are each in a range from 800° C. to 1150° C.

### Claim 6 (depends on 1)

The method of claim 1, wherein a deposition method of the first layer, the second layer and the one or more additional device layers is selected from the group consisting of: MOCVD (metal-organic chemical vapor deposition) and MOVPE (metal-organic vapor phase epitaxy).

### Claim 7 (depends on 1)

The method of claim 1, wherein the device substrate includes a GaN buffer layer deposited on a substrate.