Semiconductor packages having dummy posts
AssigneeSamsung Electronics Co., Ltd.
InventorsSanghyuck Oh, Seonghoon Bae, Kwangok Jeong
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Abstract
A semiconductor package according to an example embodiment of the present disclosure comprises: a lower redistribution structure including an insulating layer, a connection pad disposed on an upper surface of the insulating layer, and an upper pad; a semiconductor chip mounted on the lower redistribution structure and connected to the upper pad; a conductive post disposed on the connection pad; at least one dummy post disposed on the lower redistribution structure; and an upper redistribution structure disposed on the semiconductor chip and connected to the conductive post, and a height of the at least one dummy post is smaller than a height of the conductive post.
Claims19
A semiconductor package comprising:
- a lower redistribution structure comprising an insulating layer, a connection pad and an upper pad, wherein the connection pad and the upper pad are disposed on an upper surface of the insulating layer;
- a semiconductor chip mounted on the lower redistribution structure and connected to the upper pad;
- a conductive post disposed on the connection pad;
- at least one dummy post disposed on the lower redistribution structure;
- and
- an upper redistribution structure disposed on the semiconductor chip and connected to the conductive post,
- wherein a height of the at least one dummy post is less than a height of the conductive post,
- wherein the at least one dummy post is not electrically connected to the lower redistribution structure and the upper redistribution structure.
A semiconductor package comprising:
- a lower redistribution structure comprising an insulating layer, a connection pad and an upper pad, wherein the connection pad and the upper pad are disposed on an upper surface of the insulating layer;
- a semiconductor chip mounted on the lower redistribution structure and connected to the upper pad;
- a conductive post disposed on the connection pad;
- at least one center dummy post disposed in a center region of the lower redistribution structure;
- at least one edge dummy post disposed in an edge region of the lower redistribution structure;
- and
- an upper redistribution structure disposed on the semiconductor chip and connected to the conductive post,
- wherein a height of the at least one center dummy post is less than a height of the conductive post, and an upper surface of the at least one center dummy post is spaced apart from the upper redistribution structure.
A semiconductor package comprising:
- a lower redistribution structure comprising an insulating layer, a connection pad and an upper pad, wherein the connection pad and the upper pad are disposed on an upper surface of the insulating layer;
- an external connection terminal disposed below the lower redistribution structure;
- a semiconductor chip mounted on the lower redistribution structure and connected to the upper pad;
- a conductive post disposed on the connection pad;
- at least one dummy post disposed adjacent to the semiconductor chip on the lower redistribution structure;
- an upper redistribution structure disposed on the semiconductor chip and connected to the conductive post;
- and
- an encapsulant disposed between the lower redistribution structure and the upper redistribution structure and configured to cover the semiconductor chip,
- wherein a height of the at least one dummy post is less than a height of the conductive post, an upper surface of the at least one dummy post is spaced apart from the upper redistribution structure, and a portion of the at least one dummy post is embedded in the insulating layer.
Dependencies are inferred from the claim text.