Semiconductor package and method of manufacturing the same

A semiconductor package, comprising:

• a first semiconductor chip including a first substrate, redistribution pads provided on a first surface of the first substrate, and a protective layer, wherein the protective layer defining recesses that expose at least portions of the redistribution pads;
• a second semiconductor chip stacked on the first semiconductor chip, the second semiconductor chip including a second substrate and chip pads provided on a first surface of the second substrate;
• and
• a plurality of bump structures interposed between the first semiconductor chip and the second semiconductor chip,
• wherein each of the bump structures includes:
• a metal pillar provided on the chip pad of the second semiconductor chip;
• and
• a metal paste coated on an end portion of the metal pillar, and
• wherein the metal paste is bonded to the redistribution pad.

A semiconductor package, comprising:

• a lower redistribution wiring layer including first redistribution wirings stacked in at least two layers;
• a semiconductor chip disposed on the lower redistribution wiring layer and electrically connected to the first redistribution wirings;
• a plurality of bump structures interposed between the lower redistribution wiring layer and the semiconductor chip;
• a sealing member covering the semiconductor chip on the lower redistribution wiring layer;
• a plurality of through vias penetrating the sealing member and electrically connected to the first redistribution wirings;
• and
• an upper redistribution wiring layer disposed on the sealing member and including second redistribution wirings electrically connected to the plurality of through vias,
• wherein the lower redistribution wiring layer includes an uppermost insulating layer, the uppermost insulating layer defining recesses that expose at least portions of uppermost redistribution wirings among the first redistribution wirings,
• wherein each of the bump structures includes:
• a metal pillar provided on a chip pad of the semiconductor chip;
• and
• a metal paste coated on an end portion of the metal pillar, and
• wherein the metal paste is bonded to the uppermost redistribution wiring of the first redistribution wirings.