Display panel and display device

A display panel, comprising:

• a substrate comprising a display area including a first optical area, the first optical area including a central area and a bezel area located outside of the central area, and a normal area located outside of the first optical area;
• a plurality of light emitting devices disposed on the substrate, each of the plurality of light emitting devices at least including a first electrode and an emitting layer;
• a plurality of transistors disposed on the substrate in the normal area and the bezel area;
• at least one connection pattern electrically connected to at least one transistor among the plurality of transistors disposed in the bezel area;
• and
• at least two insulating layers disposed on the substrate, a portion of at least one transistor among the plurality of transistors being disposed in at least one of the at least two insulating layers,
• wherein:
• at least one light emitting device disposed in the central area among the plurality of light emitting devices is electrically connected to the at least one transistor through the at least one connection pattern;
• and
• all of respective portions of the corresponding first electrode and the corresponding emitting layer of the at least one light emitting device in the central area and the at least one connection pattern are located within a holes passing through the at least two insulating layers.

A display device, comprising:

• a substrate;
• a display area positioned on the substrate;
• a first optical area position in the display area on substrate;
• a central area within the first optical area;
• a bezel area within the first optical area that is different from the central area;
• a normal area position in the display area and located outside of the first optical area;
• a plurality of light emitting devices disposed on the substrate in the central area;
• a plurality of light emitting devices disposed on the substrate in the bezel area;
• a plurality of transistors disposed on the substrate in the bezel area, each transistor having a source-drain electrode pattern and a first active layer;
• and
• a plurality of connection patterns electrically connected between at least one transistor among the plurality of transistors disposed in the bezel area and at least one light emitting device that is among the plurality of light emitting devices disposed in the central area,
• wherein at least one of the plurality of connection patterns is disposed on a same layer as at least one active layer among active layers of the plurality of transistors.