Method of manufacturing semiconductor packages
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsLi-Ling Liao, Ming-Chih Yew, Chia-Kuei Hsu, Shin-Puu Jeng
Life of this patent
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Abstract
A package structure includes an interposer, a die, a conductive terminal and an interconnection structure that is disposed on a first side of the interposer. The die is electrically bonded to the interposer and disposed over the interconnection structure. The conductive terminal is connected to the interposer and the die via a conductive bump. In order to effectively avoid cold joint issues, round or rectangular polyimide structures are first disposed under the bumps to structurally support the bump and sufficiently increase bump height for improved electrical connection and long term reliability of the package structure.
Claims20
A method of manufacturing a package structure, comprising:
- forming an interconnection structure having a plurality of alternating conductive layers and dielectric layers;
- exposing a portion of a conductive layer through a surface of the interconnection structure;
- forming a protective layer over the interconnection structure, the protective layer defining an opening exposing the portion of the conductive layer through the surface of the interconnection structure;
- forming a raised structure over the protective layer and around the portion of the conductive layer;
- forming a conductive bump within the raised structure and in direct contact with the conductive layer through the opening in the protective layer, wherein the raised structure provides support to and elevates the conductive bump;
- and
- forming a metal pillar over the conductive bump that provides electrical connection to the conductive layer,
- wherein the raised structure remains in the package structure.
A method of manufacturing a semiconductor device, comprising:
- exposing a portion of an internal metal layer of a redistribution layer (RDL);
- forming a protective layer over the RDL with the portion of the internal metal layer exposed through the protective layer, the protective layer comprising a first material;
- forming a raised support structure on the protective layer and around the exposed internal metal layer, the raised support structure defining an empty internal portion with the internal metal layer exposed therein, and the raised support structure comprising a second material that differs from the first material;
- forming a conductive bump at least partially within the empty internal portion defined by the raised support structure, over the RDL and in contact with the exposed internal metal layer;
- and
- forming a metal pillar on the conductive bump, the metal pillar forming a metal contact that provides electrical communication with the exposed internal metal layer,
- wherein the raised support structure provides support to and elevates the conductive bump and remains in the semiconductor device.
A method of manufacturing a semiconductor device, comprising:
- forming a first layer having an exposed metal layer;
- forming a protective layer over the first layer, the protective layer having an opening exposing the exposed metal layer, the protective layer comprising a first material;
- forming a wall structure with an empty internal portion over the protective layer and around the exposed metal layer, the exposed metal layer is within the empty internal portion of the wall structure, the wall structure comprising a second material different from the first material;
- and
- forming a conductive bump at least partially within the empty internal portion of the wall structure and in contact with the exposed metal layer, wherein
- the wall structure remains in the semiconductor device.
Dependencies are inferred from the claim text.