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US 12,757,702 B2Granted
Asymmetric skip-level via structure
AssigneeInternational Business Machines Corporation
InventorsNicholas Anthony Lanzillo, Reinaldo Vega, Takashi Ando, David Wolpert
Life of this patent
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Abstract
A semiconductor interconnect structure and formation thereof. The semiconductor interconnect structure includes a skip via. The skip via includes a first skip via segment vertically connected to a second skip via segment. The first skip via segment has a first width and the second skip via segment has a second width.
Claims18
A semiconductor interconnect structure, comprising:
- a first back-end-of line (BEOL) metal level including a first row of metal lines;
- a second BEOL metal level including a second row of metal lines located above the first BEOL metal level;
- a third BEOL metal level including a third row of metal lines located above the second BEOL metal level;
- and
- a skip via connecting a metal line of the first BEOL metal level to a metal line of the third BEOL metal level, wherein the skip via includes a first skip via segment vertically connected to a second skip via segment, the first skip via segment having a bottom surface located below a bottom surface of the second row of metal lines of the second BEOL metal level and the second skip via segment having a top surface located above a top surface of the second row of metal lines of the second BEOL metal level.
2 more elements
A semiconductor interconnect structure, comprising:
- a first back-end-of line (BEOL) metal level including a first row of metal lines;
- a second BEOL metal level including a second row of metal lines located above the first BEOL metal level;
- a third BEOL metal level including a third row of metal lines located above the second BEOL metal level;
- a jumper connecting a first metal line to a second metal line located adjacent to the first metal line of the first BEOL metal level;
- and
- a skip via connecting the jumper to a metal line of the third BEOL metal level.
3 more elements
A method of forming a semiconductor interconnect structure, comprising:
- forming a first BEOL metal level, wherein the first BEOL metal level includes a first row of metal lines;
- forming a second BEOL metal level above the first BEOL metal level, wherein the second BEOL metal level includes a second row of metal lines;
- forming a third BEOL metal level above the second BEOL metal level, wherein the third BEOL metal level includes a third row of metal lines;
- and
- forming a skip via that connects a metal line of the first BEOL metal level to a metal line of the third BEOL metal level, wherein the skip via includes a first skip via segment vertically connected to a second skip via segment, the first skip via segment having a bottom surface located below a bottom surface of the second row of metal lines of the second BEOL metal level and the second skip via segment having a top surface located above a top surface of the second row of metal lines of the second BEOL metal level.
2 more elements
Dependencies are inferred from the claim text.