Display apparatus
AssigneeSamsung Display Co., Ltd.
InventorsYoungjin Cho, Jisu Na
Life of this patent
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Abstract
Provided is a display apparatus, in which a parasitic capacitor is minimized or prevented, including a substrate, a semiconductor layer disposed on the substrate and including a source area and a drain area and a channel area disposed between the source area and the drain area, and a gate layer disposed on the semiconductor layer and including a gate area disposed on the channel area, a first conductive layer including a first subconductive layer disposed on the gate layer and electrically connected to the gate area, and a second conductive layer including a second subconductive layer disposed on the first conductive layer and electrically connected to the source area and covering the first subconductive layer.
Claims21
A display apparatus, comprising:
- a substrate;
- a semiconductor layer disposed on the substrate and comprising a source area, a drain area, and a channel area disposed between the source area and the drain area;
- a gate layer disposed on the semiconductor layer, and comprising a gate area disposed on the channel area;
- a first conductive layer disposed on the gate layer and comprising a first subconductive layer electrically connected to the gate area;
- a second conductive layer disposed on the first conductive layer, electrically connected to the source area, and comprising a second subconductive layer covering the first subconductive layer.
A display apparatus, comprising:
- a substrate;
- a first transistor disposed on the substrate, the first transistor comprising:
- an oxide semiconductor layer comprising a source area, a channel area, and a drain area, and
- a gate area disposed on the channel area;
- a first wiring connected to the gate area, disposed on the first transistor, and extending in a first direction;
- a pixel electrode disposed on the first wiring;
- and
- a second wiring disposed between the first wiring and the pixel electrode, connected to the source area, and overlapping at least partially with the first wiring in plan view.
Dependencies are inferred from the claim text.