Image sensor package including a chip stack structure
AssigneeSamsung Electronics Co., Ltd.
InventorKyongsoon Cho
Life of this patent
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Abstract
An image sensor package includes a package substrate, a logic chip mounted on the package substrate and having a central region and an edge region, an image sensor chip mounted on the central region of the logic chip, a bonding wire electrically interconnecting the package substrate to the logic chip and bonded to the edge region of the logic chip, a dam structure disposed in the edge region of the logic chip to cover a portion of the bonding wire, a cover glass disposed on the dam structure, and an encapsulation structure encapsulating the bonding wire on the package substrate.
Claims10
An image sensor package, comprising:
- a package substrate;
- a logic chip mounted on the package substrate and including a central region and an edge region;
- an image sensor chip mounted on the central region of the logic chip;
- a bonding wire electrically interconnecting the package substrate to the logic chip, the bonding wire bonded to the edge region of the logic chip;
- a dam structure disposed in the edge region of the logic chip and covering a portion of the bonding wire;
- a cover glass disposed on the dam structure;
- and
- an encapsulation structure encapsulating the bonding wire on the package substrate,
- wherein the encapsulation structure and the image sensor chip is separated by the dam structure.
Dependencies are inferred from the claim text.