Low-K gate spacer and methods for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Kai Lin, Bo-Yu Lai, Li Chun Te, Kai-Hsuan Lee, Sai-Hooi Yeong, Tien-I Bao, Wei-Ken Lin
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Abstract
Embodiments of the present disclosure relate to a FinFET device having gate spacers with reduced capacitance and methods for forming the FinFET device. Particularly, the FinFET device according to the present disclosure includes gate spacers formed by two or more depositions. The gate spacers are formed by depositing first and second materials at different times of processing to reduce parasitic capacitance between gate structures and contacts introduced after epitaxy growth of source/drain regions.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming a first spacer layer over a fin structure and a dummy gate stack, the dummy gate stack being over the fin structure, the dummy gate stack comprising a dummy gate and a mask layer over the dummy gate;
- depositing a sacrificial layer over the first spacer layer, wherein the first spacer layer separates the sacrificial layer from an upper surface of the fin structure and an upper surface of the dummy gate stack;
- performing an etch process to expose portions of the fin structure while sidewalls of the dummy gate remain completely covered by the sacrificial layer and the first spacer layer in a cross-sectional view, wherein at least a portion of a sidewall of the mask layer is exposed;
- growing source/drain regions from the exposed portions of the fin structure;
- removing the sacrificial layer to expose the first spacer layer adjacent the dummy gate stack;
- and
- replacing the dummy gate stack with a gate structure.
A method of forming a semiconductor device, the method comprising:
- forming a first dummy gate structure over a first fin structure and a second dummy gate structure over a second fin structure, the first dummy gate structure comprising a first dummy gate and a first mask layer over the first dummy gate, the second dummy gate structure comprising a second dummy gate and a second mask layer over the second dummy gate;
- forming a first spacer layer over the first dummy gate structure, the first fin structure, the second dummy gate structure, and the second fin structure;
- forming a first sacrificial layer over the first spacer layer;
- removing portions of the first sacrificial layer and the first spacer layer to expose the first fin structure and at least a portion of the first mask layer;
- forming first source/drain regions adjacent the first dummy gate structure;
- after forming the first source/drain regions, removing the first sacrificial layer;
- forming a second sacrificial layer over the first spacer layer, the second dummy gate structure, and the second fin structure;
- removing portions of the second sacrificial layer and the first spacer layer to expose the second fin structure and at least a portion of the second mask layer;
- and
- forming second source/drain regions adjacent the second dummy gate structure.
A method of forming a semiconductor device, the method comprising:
- forming a first dummy gate over a first fin structure and a second dummy gate over a second fin structure;
- forming a first spacer layer over the first dummy gate, the first fin structure, the second dummy gate, and the second fin structure;
- forming a first sacrificial layer over the first spacer layer;
- removing portions of the first sacrificial layer and the first spacer layer to expose an upper portion of the first fin structure, wherein the first sacrificial layer remains over the second dummy gate;
- forming first source/drain regions on the first fin structure;
- removing the first sacrificial layer from over the first dummy gate and the second dummy gate;
- forming a second sacrificial layer over the first spacer layer, the first dummy gate, the second dummy gate, and the second fin structure;
- removing portions of the second sacrificial layer and the first spacer layer to expose an upper portion of the second fin structure, wherein, after removing portions of the second sacrificial layer and the first spacer layer to expose the second fin structure, portions of the first spacer layer remain along sidewalls of the second fin structure to form spacer portions, wherein the second sacrificial layer remains over the first dummy gate;
- and
- forming second source/drain regions on the second fin structure.
Dependencies are inferred from the claim text.