Semiconductor device having source/drain pattern including multiple layers with different conductivity type

A semiconductor device comprising:

• an active pattern which includes a first lower pattern and a plurality of first sheet patterns, wherein the first lower pattern extends in a first direction, and the plurality of first sheet patterns are spaced apart from the first lower pattern in a second direction;
• a gate structure, which includes a gate electrode and a gate spacer extending in a third direction intersecting the first direction and the second direction, disposed on the active pattern;
• a first source/drain pattern disposed adjacent to a first side of the gate structure;
• and
• a second source/drain pattern which is spaced apart from the first source/drain pattern with the gate structure interposed therebetween,
• wherein the first source/drain pattern includes:
• a first layer including a first conductivity type;
• and
• a second layer including a second conductivity type different from the first conductivity type, and
• further includes a third layer including the first conductivity type, wherein the second layer is surrounded by the first layer and the third layer,
• wherein the second source/drain pattern has the second conductivity type, and
• wherein side surfaces of the plurality of first sheet patterns are in contact with the first layer and the second source/drain pattern, and are not in contact with the second layer.

A semiconductor device comprising:

• an active pattern which includes a first lower pattern and a plurality of first sheet patterns, wherein the first lower pattern extends in a first direction, and the plurality of first sheet patterns are spaced apart from the first lower pattern in a second direction crossing the first direction;
• a gate structure, which includes a gate electrode and a gate spacer extending in a third direction intersecting the first direction and the second direction, disposed on the active pattern;
• a first source/drain pattern disposed adjacent to a first side of the gate structure;
• a second source/drain pattern which is spaced apart from the first source/drain pattern with the gate structure interposed therebetween;
• a first source/drain contact disposed on the first source/drain pattern;
• and
• an internal spacer which is disposed between the plurality of first sheet patterns in the second direction, and is disposed between the first source/drain pattern and the gate electrode in the first direction, and between the second source/drain pattern and the gate electrode,
• wherein the first source/drain pattern includes:
• a first layer including a first conductive type and disposed on the first lower pattern;
• a second layer including a second conductivity type, which is different from the first conductivity type, and disposed on the first layer;
• and
• a third layer including the first conductivity type and disposed on the second layer,
• wherein the second source/drain pattern has the second conductivity type,
• wherein the first layer surrounds a side surface and a lower surface of the second layer,
• wherein the third layer covers an upper surface of the second layer, and
• wherein the first source/drain contact penetrates the third layer, and a lower surface of the first source/drain contact is disposed inside the second layer.