Fully-isolated MOS device
AssigneeUnited Microelectronics Corp.
InventorsYu Hsuan Chang, Ching-Wei Li, Jih San Lee, Tien-Hao Tang
Life of this patent
Estimating the term…
Loading patent…
AssigneeUnited Microelectronics Corp.
InventorsYu Hsuan Chang, Ching-Wei Li, Jih San Lee, Tien-Hao Tang
Estimating the term…
A fully-isolated metal oxide semiconductor (MOS) device includes a substrate, an isolation well, a gate structure, a source region, a gradient region, a drain region, a first well, and an electro static discharge (ESD) protection region. The isolation well is formed in the substrate, and the gate structure is formed on the isolation well. The source region and the gradient region are formed in the isolation wells on both sides of the gate structure respectively, and the drain region is formed in the gradient region. The first well is formed below the drain region in the gradient region, and the ESD protection region is formed in the first well. The isolation well and the ESD protection region have a first conductivity type, and the gradient region and the first well have a second conductivity type.
A fully-isolated metal oxide semiconductor (MOS) device, comprising:
Dependencies are inferred from the claim text.