Synchronization signal block pattern enhancement

An apparatus comprising:

• one or more baseband processors configured to:
• receive a Synchronization Signal Block (SSB) including a sequence that extends a synchronization signal or a physical broadcast channel (PBCH) of the SSB to a set of REs that are unused in a pre-configuration for transmitting the SSB, the REs being unused in the configuration for transmitting a primary synchronization signal (PSS), a secondary synchronization signal (SSS), or the PBCH, wherein a number of subcarriers for the PSS, SSS, or the PBCH is increased from the pre-configuration to extend the PSS, SSS, or the PBCH;
• and
• send, based on decoding the SSB including the, a transmission to a base station associated with the SSB.

Processing circuitry comprising:

• one or more processors configured for performing wireless communication by performing operations to:
• receive a Synchronization Signal Block (SSB) including a sequence that extends a synchronization signal or a physical broadcast channel (PBCH) of the SSB to a set of REs that are unused in a pre-configuration for transmitting the SSB, the REs being unused in the configuration for transmitting a primary synchronization signal (PSS), a secondary synchronization signal (SSS), or the PBCH, wherein a number of subcarriers for the PSS, SSS, or the PBCH is increased from the pre-configuration to extend the PSS, SSS, or the PBCH;
• and
• send, based on decoding the SSB including the sequence, a transmission to a base station associated with the SSB.