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US 12,756,866 B2Granted
Video pixel throughput scalability architecture based on bitrate
AssigneeQUALCOMM Incorporated
InventorsNaveen Kumar Ponnusamy, Shengqi Yang, Kishore Chamarthi
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Abstract
An apparatus for coding video data includes a video syntax processing (VSP) engine and at least one video pixel processing (VPP) engine. The VSP engine processes video data at a syntax element level, while the VPP engine processes video data at a pixel level. A controller determines the bitrate of a video coding session and adjusts the power or clock speed of the VPP engine based on the bitrate.
Claims20
An apparatus configured to code video data, the apparatus comprising:
- a video syntax processing (VSP) engine configured to process the video data at a syntax element level;
- at least one video pixel processing (VPP) engine configured to process the video data at a pixel level;
- and
- a controller configured to:
- determine a bitrate of a video coding session;
- and
- control one or more of a power or a clock speed of the at least one VPP engine based on the bitrate of the video coding session.
4 more elements
A method for coding video data, comprising:
- determining a bitrate of a video coding session;
- processing the video data at a syntax element level using a video syntax processing (VSP) engine at the bitrate;
- processing the video data at a pixel level using at least one video pixel processing (VPP) engine;
- and
- controlling one or more of a power or a clock speed of the at least one VPP engine based on the bitrate of the video coding session.
2 more elements
Dependencies are inferred from the claim text.