Charging system, charging method, and vehicle

A charging method, applied to a charging system, wherein the charging system comprises a primary-side bridge circuit, a transformer, a first secondary-side bridge circuit, and a second secondary-side bridge circuit, the primary-side bridge circuit is connected with a primary winding of the transformer, the secondary winding of the transformer comprises a first secondary winding and a second secondary winding, the first secondary-side bridge circuit is connected with the first secondary winding, and the second secondary-side bridge circuit is connected with the second secondary winding;

• the first secondary-side bridge circuit comprises a first half-bridge circuit and a second half-bridge circuit connected in parallel;
• the first half-bridge circuit comprises a first switching transistor and a second switching transistor, and the second half-bridge circuit comprises a third switching transistor and a fourth switching transistor;
• the first switching transistor and the fourth switching transistor are arranged diagonally, and the second switching transistor and the third switching transistor are arranged diagonally;
• and the method comprises:
• turning on switching transistors of the first secondary-side bridge circuit once switching transistors of the primary-side bridge circuit are on for a duration Td, on condition that power is transferred from the first secondary-side bridge circuit to the second secondary-side bridge circuit;
• wherein the method further comprises:
• controlling the first secondary-side bridge circuit by asymmetrical pulse width modulation (PWM);
• wherein controlling the first secondary-side bridge circuit by the asymmetrical PWM comprises:
• turning on the first switching transistor and the fourth switching transistor simultaneously on condition that the first switching transistor and the fourth switching transistor form a loop, wherein an on duration T1 of the first switching transistor is longer than an on duration T2 of the fourth switching transistor;
• and
• turning on the second switching transistor and the third switching transistor simultaneously on the condition that the second switching transistor and the third switching transistor form a loop, wherein an on duration T1 of the third switching transistor is longer than an on duration T2 of the second switching transistor.

A vehicle comprising a charging system, wherein the charging system comprises a primary-side bridge circuit, a transformer, a first secondary-side bridge circuit, and a second secondary-side bridge circuit, wherein:

• the primary-side bridge circuit is connected with a primary winding of the transformer, the secondary winding of the transformer comprises a first secondary winding and a second secondary winding, the first secondary-side bridge circuit is connected with the first secondary winding, and the second secondary-side bridge circuit is connected with the second secondary winding;
• and
• on condition that power is transferred from the first secondary-side bridge circuit to the second secondary-side bridge circuit, switching transistors of the first secondary-side bridge circuit are turned on once switching transistors of the primary-side bridge circuit are on for a duration Td;
• wherein:
• the first secondary-side bridge circuit is controlled by asymmetrical pulse width modulation (PWM);
• the first secondary-side bridge circuit comprises a first half-bridge circuit and a second half-bridge circuit connected in parallel;
• the first half-bridge circuit comprises a first switching transistor and a second switching transistor, and the second half-bridge circuit comprises a third switching transistor and a fourth switching transistor;
• and the first switching transistor and the fourth switching transistor are arranged diagonally, and the second switching transistor and the third switching transistor are arranged diagonally;
• and
• the first secondary-side bridge circuit being controlled by the asymmetrical PWM comprises:
• the first switching transistor and the fourth switching transistor being turned on simultaneously on condition that the first switching transistor and the fourth switching transistor form a loop, wherein an on duration T1 of the first switching transistor is longer than an on duration T2 of the fourth switching transistor;
• and
• the second switching transistor and the third switching transistor being turned on simultaneously on the condition that the second switching transistor and the third switching transistor form a loop, wherein an on duration T1 of the third switching transistor is longer than an on duration T2 of the second switching transistor.