Back to results
US 12,755,781 B2Granted
Memory device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorShih-Lien Linus Lu
Life of this patent
Estimating the term…
Abstract
A memory device is provided. The memory device includes a cell array having a plurality of cells, each of the plurality of cells operative to store a bit value. The memory device further includes a reset circuit connected to the cell array. The reset circuit is operative to reset, in parallel, the bit value stored in each of the plurality of cells to a predetermined bit value.
Claims20
A memory device comprising
- a cell array comprising a plurality of cells, each of the plurality of cells operative to store a bit value;
- and
- a reset circuit connected to the cell array, wherein the reset circuit is operative to:
- partition the plurality of cells in a first sub-block and a second sub-block,
- trigger reset of a first plurality of cells in the first sub-block in parallel, and
- trigger reset of a second plurality of cells in the second sub-block in parallel.
3 more elements
A memory device comprising:
- a cell array comprising a plurality of cells, each of the plurality of cells operative to store one bit value;
- a power control circuit operative to generate a first signal indicating an initiation of a power up duration of the plurality of cells and a second signal indicating a completion of the power up duration of the plurality of cells;
- and
- a reset circuit operative to:
- partition the plurality of cells in a first sub-block and a second sub-block,
- reset a first plurality of cells in the first sub-block in parallel, and
- reset a second plurality of cells in the second sub-block in parallel.
4 more elements
A method comprising:
- determining that a number of a plurality of cells in an array of a memory device is more than a predetermined number;
- partitioning the plurality of cells in a first sub-block and a second sub-block;
- triggering reset of a first plurality of cells in the first sub-block in parallel;
- and
- triggering reset of a second plurality of cells in the second sub-block in parallel.
2 more elements
Dependencies are inferred from the claim text.