Semiconductor memory device including global power rails and memory system having the same

A memory device comprising:

• a first global power rail connected to a first power terminal for supplying a first power voltage;
• a second global power rail connected to a second power terminal for supplying a second power voltage;
• a third global power rail;
• a fourth global power rail;
• and
• a power management circuit configured to receive a power down command from a controller, and change a normal mode of a low frequency operation into a standby mode of the low frequency operation in response to the power down command related to the standby mode,
• wherein the power management circuit is configured to connect the second global power rail to the third global power rail and the fourth global power rail in the normal mode of the low frequency operation, and
• wherein the power management circuit is configured to connect the second global power rail to the third global power rail and disconnect the second global power rail from the fourth global power rail in the standby mode of the low frequency operation.

A memory device comprising:

• a first switch configured to connect a first global power rail to a third global power rail in response to a first power switching control signal;
• a second switch configured to connect the first global power rail to a fourth global power rail in response to a second power switching control signal;
• a third switch configured to connect a second global power rail to the third global power rail in response to a third power switching control signal;
• a fourth switch configured to connect the second global power rail to the fourth global power rail in response to a fourth power switching control signal a fifth switch configured to connect the third global power rail to a plurality of first local power rails in response to a fifth power switching control signal;
• a sixth switch configured to connect the fourth global power rail to a plurality of second local power rails in response to a sixth power switching control signal;
• and
• a power management circuit configured to receive a power down command from a controller, change a normal mode into a standby mode in response to the power down command related to the standby mode, and generate the first power switching control signal to the sixth power switching control signal corresponding to the power down command.