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US 12,755,707 B2Granted
Display device and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsAtsushi Umezaki, Hajime Kimura
Life of this patent
Estimating the term…
Abstract
A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.
Claims7
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to a gate signal line,
- wherein the other of the source and the drain of the first transistor is electrically connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is electrically connected to the gate signal line,
- wherein one of a source and a drain of the third transistor is electrically connected to an output signal line,
- wherein the other of the source and the drain of the third transistor is electrically connected to the clock signal line,
- wherein a gate of the third transistor is electrically connected to a gate of the first transistor,
- wherein one of a source and a drain of the fourth transistor is electrically connected to the output signal line,
- wherein the other of the source and the drain of the fourth transistor is electrically connected to a power supply line,
- wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the fifth transistor is electrically connected to the power supply line,
- wherein a gate of the fifth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the sixth transistor is electrically connected to a first signal line,
- wherein a gate of the sixth transistor is electrically connected to the first signal line,
- wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the seventh transistor is electrically connected to the power supply line,
- wherein a gate of the seventh transistor is electrically connected to a second signal line,
- wherein one of a source and a drain of the eighth transistor is electrically connected to a first wiring,
- wherein the other of the source and the drain of the eighth transistor is electrically connected to the gate of the second transistor,
- wherein a gate of the eighth transistor is electrically connected to the first wiring,
- wherein one of a source and a drain of the ninth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the ninth transistor is electrically connected to the power supply line,
- wherein a gate of the ninth transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the tenth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the tenth transistor is electrically connected to the power supply line, and
- wherein a gate of the tenth transistor is electrically connected to the first signal line.
25 more elements
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to a gate signal line,
- wherein the other of the source and the drain of the first transistor is electrically connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is electrically connected to the gate signal line,
- wherein one of a source and a drain of the third transistor is electrically connected to an output signal line,
- wherein the other of the source and the drain of the third transistor is electrically connected to the clock signal line,
- wherein a gate of the third transistor is electrically connected to a gate of the first transistor,
- wherein one of a source and a drain of the fourth transistor is electrically connected to the output signal line,
- wherein the other of the source and the drain of the fourth transistor is electrically connected to a power supply line,
- wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the fifth transistor is electrically connected to the power supply line,
- wherein a gate of the fifth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the sixth transistor is electrically connected to a first signal line,
- wherein a gate of the sixth transistor is electrically connected to the first signal line,
- wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the seventh transistor is electrically connected to the power supply line,
- wherein a gate of the seventh transistor is electrically connected to a second signal line,
- wherein one of a source and a drain of the eighth transistor is electrically connected to a first wiring,
- wherein the other of the source and the drain of the eighth transistor is electrically connected to the gate of the second transistor,
- wherein a gate of the eighth transistor is electrically connected to the first wiring,
- wherein one of a source and a drain of the ninth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the ninth transistor is electrically connected to the power supply line,
- wherein a gate of the ninth transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the tenth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the tenth transistor is electrically connected to the power supply line,
- wherein a gate of the tenth transistor is electrically connected to the first signal line,
- wherein a W/L ratio of the first transistor is larger than a W/L ratio of the second transistor,
- wherein the W/L ratio of the first transistor is larger than a W/L ratio of the fifth transistor,
- wherein the W/L ratio of the first transistor is larger than a W/L ratio of the sixth transistor, and
- wherein the W/L ratio of the first transistor is larger than a W/L ratio of the seventh transistor.
29 more elements
A semiconductor device comprising:
- a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to a gate signal line,
- wherein the other of the source and the drain of the first transistor is electrically connected to a clock signal line,
- wherein one of a source and a drain of the second transistor is electrically connected to the gate signal line,
- wherein one of a source and a drain of the third transistor is electrically connected to an output signal line,
- wherein the other of the source and the drain of the third transistor is electrically connected to the clock signal line,
- wherein a gate of the third transistor is electrically connected to a gate of the first transistor,
- wherein one of a source and a drain of the fourth transistor is electrically connected to the output signal line,
- wherein the other of the source and the drain of the fourth transistor is electrically connected to a power supply line,
- wherein a gate of the fourth transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the fifth transistor is electrically connected to the power supply line,
- wherein a gate of the fifth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the sixth transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the sixth transistor is electrically connected to a first signal line,
- wherein a gate of the sixth transistor is electrically connected to the first signal line,
- wherein one of a source and a drain of the seventh transistor is electrically connected to the gate of the first transistor,
- wherein the other of the source and the drain of the seventh transistor is electrically connected to the power supply line,
- wherein a gate of the seventh transistor is electrically connected to a second signal line,
- wherein one of a source and a drain of the eighth transistor is electrically connected to a first wiring,
- wherein the other of the source and the drain of the eighth transistor is electrically connected to the gate of the second transistor,
- wherein a gate of the eighth transistor is electrically connected to the first wiring,
- wherein one of a source and a drain of the ninth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the ninth transistor is electrically connected to the power supply line,
- wherein a gate of the ninth transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the tenth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the tenth transistor is electrically connected to the power supply line,
- wherein a gate of the tenth transistor is electrically connected to the first signal line,
- wherein the clock signal line comprises a region having a width smaller than a channel width of the first transistor,
- wherein the clock signal line comprises a region having a width smaller than a channel width of the second transistor,
- wherein the clock signal line comprises a region having a width smaller than a channel width of the sixth transistor, and
- wherein the clock signal line comprises a region having a width larger than a width of the first wiring.
29 more elements
Dependencies are inferred from the claim text.