Display device

A display device comprising:

• a display panel including a plurality of pixels,
• wherein each of the plurality of pixels includes:
• a light-emitting element configured to emit light in response to a driving current;
• a driving transistor configured to control the driving current;
• a capacitor connected between a high potential driving voltage and a gate electrode of the driving transistor;
• a first transistor configured to connect the gate electrode and a drain electrode of the driving transistor to each other in response to a first scan signal;
• a second transistor configured to apply a data voltage to a source electrode of the driving transistor in response to a second scan signal;
• a third transistor configured to apply the high-potential driving voltage to the source electrode of the driving transistor in response to a light-emission control signal;
• a fourth transistor configured to connect the drain electrode of the driving transistor and the light-emitting element to each other in response to the light-emission control signal to establish a current flow path between the high-potential driving voltage and the low-potential driving voltage;
• a fifth transistor configured to apply a bias voltage to the source electrode of the driving transistor in response to a third scan signal;
• and
• a sixth transistor configured to apply an anode reset voltage to an anode electrode of the light-emitting element and the drain electrode of the driving transistor in response to the third scan signal,
• wherein when the display device operates in a Variable Refresh Rate (VRR) mode, the display device is configured to adjust at least one of a level or an application time of the bias voltage based on a refresh rate in an anode reset frame, and
• wherein when the refresh rate falls within a second reference range, the display device is configured to:
• apply the anode reset voltage of a fixed level equal to a level of the anode reset voltage applied in a refresh frame for a predetermined time duration of the anode reset frame;
• and
• apply the anode reset voltage of a level lower than the level of the anode reset voltage applied in the refresh frame for a remaining time duration of the anode reset frame.

A display device comprising:

• a display panel including a plurality of pixels, each pixel including a bias transistor and a driving transistor;
• a gate driver configured to control the bias transistor to apply a first bias voltage to a terminal of the driving transistor in a refresh frame and to apply a second bias voltage to the terminal of the driving transistor in an anode reset frame, the second bias voltage greater than the first bias voltage,
• wherein the display device operates in a variable refresh rate (VRR) mode, and
• wherein a voltage value of the second bias voltage is variable based on a refresh rate of an operation of the display device, and
• wherein when the refresh rate falls within a second reference range, the display device is configured to:
• apply an anode reset voltage of a fixed level equal to a level of the anode reset voltage applied in the refresh frame for a predetermined time duration of the anode reset frame;
• and
• apply the anode reset voltage of a level lower than the level of the anode reset voltage applied in the refresh frame for a remaining time duration of the anode reset frame.