Display device and electronic device including display device

A display device comprising:

• a first sub-pixel and a second sub-pixel connected to a first scan line, a second scan line, a j-th data line, where j is an integer greater than or equal to 1, and emission control lines, the first scan line being configured to receive a first scan signal, and the second scan line being configured to receive a second scan signal,
• wherein the first sub-pixel is located in an i-th pixel row, where i is an integer greater than or equal to 0, and a j-th pixel column, and comprises:
• a first transistor connected between a first node and a second node, and comprising a gate electrode connected to a third node;
• a second transistor connected between the third node and a fourth node, and configured to be turned on when the second scan signal is supplied to the second scan line;
• a third transistor connected between the first node and a first power line configured to receive a first driving power, and configured to be turned on when a first emission signal is supplied to a first emission control line from among the emission control lines;
• a fourth transistor connected between the second node and a fifth node, and configured to be turned on when a second emission signal is supplied to a second emission control line from among the emission control lines;
• a first capacitor connected between the second node and the third node;
• and
• a first light emitting element connected between the fifth node and a second power line configured to receive a second driving power, and
• wherein the second sub-pixel is located in the i-th pixel row and a j−1-th pixel column, and comprises:
• a fifth transistor connected between a sixth node and a seventh node, and comprising a gate electrode connected to the fourth node;
• a sixth transistor connected between the j-th data line and the fourth node, and configured to be turned on when the first scan signal is supplied to the first scan line;
• a seventh transistor connected between the sixth node and the first power line, and configured to be turned on when the first emission signal is supplied to the first emission control line;
• an eighth transistor connected between the seventh node and an eighth node, and configured to be turned on when the second emission signal is supplied to the second emission control line;
• a second capacitor connected between the fourth node and the seventh node;
• and
• a second light emitting element connected between the eighth node and the second power line.