Implement the computation of an artificial neural network using multiple deep learning accelerators

A computing apparatus, comprising:

• memory;
• and
• at least one microprocessor configured to:
• receive data representative of a description of an artificial neural network;
• converting, by utilizing a compiler, the description of the artificial neural network into computer instructions and matrices;
• identify a plurality of portions of the artificial neural network;
• generate, from the data representative of the description of the artificial neural network and based on the instructions and matrices converted from the description by the compiler, a plurality of compiler outputs configured to be executed on a plurality of devices respectively and by utilizing a selected portion of the plurality of portions, wherein the plurality of compiler outputs are executable on the plurality of devices to autonomously generate an output of the artificial neural network responsive to an input to the artificial neural network;
• write, into the memory, the plurality of compiler outputs;
• and
• execute a portion of the compiler outputs in parallel to process the input concurrently to adjust a latency between the input to the artificial neural network to the output from the artificial neural network.

A non-transitory computer-readable medium storing instructions which when executed by a computing apparatus cause the computing apparatus to perform a method, the method comprising:

• receiving, in the computing apparatus, data representative of a description of an artificial neural network;
• converting, by utilizing a compiler, the description of the artificial neural network into computer instructions and matrices;
• identifying, by the computing apparatus, a plurality of portions of the artificial neural network;
• generating, by the computing apparatus from the data representative of the description of the artificial neural network and based on the instructions and matrices converted from the description by the compiler, and by utilizing a selected portion of the plurality of portions, a plurality of compiler outputs configured to be executed on a plurality of devices respectively, wherein the plurality of compiler outputs are executable on the plurality of devices to autonomously generate an output of the artificial neural network responsive to an input to the artificial neural network;
• writing, into a memory of the computing apparatus, the plurality of compiler outputs;
• and
• executing, by utilizing the plurality of devices, a portion of the compiler outputs in parallel to process the input concurrently to adjust a latency between the input to the artificial neural network to the output from the artificial neural network.