Accelerator for deep neural networks

A system for bit-serial computation in a neural network, comprising:

• one or more bit-serial tiles for performing bit-serial computations in a neural network wherein the one or more bit-serial tiles process two or more windows in parallel, each bit-serial tile receiving input neurons in two or more windows and synapses in two or more filters, and communicating output neurons;
• and
• an activation memory for storing neurons and in communication with the one or more bit-serial tiles using a dispatcher,
• wherein the dispatcher reads neurons from the activation memory and communicates the neurons to the one or more bit-serial tiles via two or more window lanes for each bit-serial tile,
• wherein the dispatcher reads synapses from a memory and communicates the synapses to the one or more bit-serial tiles via two or more filter lanes for each bit-serial tile, and
• wherein the neurons and the synapses are communicated to the one or more bit-serial tiles bit-serially.

A battery-operated device comprising a bit-serial neural network accelerator, the battery-operated device comprising:

• one or more bit-serial tiles for performing bit-serial computations in a neural network wherein the one or more bit-serial tiles process two or more windows in parallel, each bit-serial tile receiving input neurons in two or more windows and synapses in two or more filters, and generating output neurons;
• and
• an activation memory for storing neurons and in communication with the one or more bit-serial tiles using a dispatcher,
• wherein the dispatcher reads neurons from the activation memory and communicates the neurons to the one or more bit-serial tiles via two or more window lanes for each bit-serial tile,
• wherein the dispatcher reads synapses from a memory and communicates the synapses to the one or more bit-serial tiles via two or more filter lanes for each bit-serial tile, and
• wherein one of the neurons or the synapses are communicated to the one or more bit-serial tiles bit-serially and the other of the neurons or the synapses are communicated to the one or more bit-serial tiles bit-parallelly.