Mapping neural networks to hardware

A non-transitory computer readable storage medium having stored thereon computer readable code configured to cause a method of mapping a neural network to hardware to be performed when the code is run, the method of mapping a neural network to hardware comprising using a binary tree to assess how to split a layer of the neural network into a plurality of hardware passes, each hardware pass reading a subset of the coefficients of the layer from external memory and wherein the coefficients are stored in compressed form in the memory and each node in the binary tree corresponding to a different subset of the coefficients, wherein using the binary tree to assess how to split the layer of the neural network into the plurality of hardware passes comprises:

• (i) determining a starting value of a current depth within the binary tree;
• (ii) arranging the set of coefficients into groups, each group corresponding to a node at the current depth;
• (iii) calculating a compressed size of at least one group of coefficients at the current depth;
• (iv) determining whether termination criteria are satisfied, at least one of the termination criteria being based on a comparison between the calculated compressed size and a hardware size constraint;
• (v) in response to determining that the termination criteria are not satisfied, updating the current depth and repeating steps (ii)-(iv);
• and
• (vi) in response to determining that the termination criteria are satisfied, outputting data defining each of the plurality of hardware passes for the layer, wherein the data is dependent upon the current depth.

A computing device comprising:

• a processor;
• and
• memory arranged to store computer readable code configured to cause a method of mapping a neural network to hardware to be performed when the code is executed by the processor, the method of mapping a neural network to hardware comprising using a binary tree to assess how to split a layer of the neural network into a plurality of hardware passes, each hardware pass reading a subset of the coefficients of the layer from external memory and wherein the coefficients are stored in compressed form in the memory and each node in the binary tree corresponding to a different subset of the coefficients, wherein using the binary tree to assess how to split the layer of the neural network into the plurality of hardware passes comprises:
• (i) determining a starting value of a current depth within the binary tree;
• (ii) arranging the set of coefficients into groups, each group corresponding to a node at the current depth;
• (iii) calculating a compressed size of at least one group of coefficients at the current depth;
• (iv) determining whether termination criteria are satisfied, at least one of the termination criteria being based on a comparison between the calculated compressed size and a hardware size constraint;
• (v) in response to determining that the termination criteria are not satisfied, updating the current depth and repeating steps (ii)-(iv);
• and
• (vi) in response to determining that the termination criteria are satisfied, outputting data defining each of the plurality of hardware passes for the layer, wherein the data is dependent upon the current depth.