Fast matrix multiplication
OwnerSudarshan Kumarinventor
Life of this patent
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Abstract
A system and method of multiplying a first matrix and a second matrix is provided, the method comprising compressing the second matrix into a third matrix to process primarily non-zero values. For each row in the first matrix, a row may be loaded into a row lookup unit. For each entry in the third matrix, a row address may be extracted, a row value may be obtained from a corresponding loaded row of the first matrix based on the extracted row address, the row value from the loaded row may be multiplied with the matrix value from the third matrix for each column, and the multiplied value may be added to an accumulator corresponding to the each column. Lastly, a multiplied matrix may be output for the loaded row.
Claims11
A system configured to conduct a computation, the system comprising:
- a memory system configured to provide operands for the computation and store results;
- a sequencer configured to:
- in a first step, load a set of the operands from the memory system;
- in a second step after the first step, shift the loaded set of operands to form shifted operands;
- in a third step after the second step, provide each operand of the shifted operands to a multiplier accumulator (MAC) from an array of MACs as an operand while skipping ones of the shifted operands that are zero;
- the array of MACs, each MAC of the array of MACs comprising:
- a plurality of registers configured to receive an input of provided operands and shift the provided operands between adjacent MACs in the MAC array or within the each MAC;
- a multiplier configured to multiply the provided operands;
- an accumulator configured to store a temporary result;
- and
- an adder circuit comprising a carry propagate adder configured to add redundant sum and carry outputs to calculate a final output.
Dependencies are inferred from the claim text.