Coprocessor utilization in database hosts for expedited query processing

One or more tangible computer-readable storage media encoding processor-executable instructions for implementing a computer process for selecting an execution plan for implementing a database query at a host device, the processor-executable instructions including operations for:

• determining query fragments collectively executable to implement the database query;
• identifying one or more subplans for executing the query fragments, each of the one or more subplans defining at least one query fragment and a table that is operated on by the at least one query fragment;
• accessing capabilities of a hardware coprocessor of the host device, the capabilities including at least a size of memory accessible to the hardware coprocessor;
• determining, based on the capabilities stored for the hardware coprocessor, whether a select subplan of the one or more subplans is viable for implementation by the hardware coprocessor;
• in response to determining that the select subplan is viable for implementation by the hardware coprocessor, selecting for implementation a distributed execution plan for distributing the query fragments of the database query among a central processing system of the host device and the hardware coprocessor of the host device, the distributed execution plan delegating the select subplan to the hardware coprocessor;
• and
• executing the distributed execution plan by the host device.

A database management system including:

• memory;
• and
• a database optimizer stored in the memory and executable by a processor to:
• access capabilities stored for a hardware coprocessor included within a host device, the capabilities including at least a size of memory accessible to the hardware coprocessor;
• based at least in part on the capabilities stored for the hardware coprocessor, select a distributed execution plan that includes query fragments collectively executable to execute a database query on the host device, the distributed execution plan including a subplan and a data movement operator to be executed by the hardware coprocessor of the host device;
• a central processing system in the host device that receives the distributed execution plan and that transmits the subplan to the hardware coprocessor along with the data movement operator, the data movement operator causing the hardware coprocessor to transmit error information associated with execution of the subplan back to the central processing system in response to executing at least a portion of the subplan.