Efficient processing on a dual core processing system
AssigneeCirrus Logic, Inc.
InventorsTrenton Henry, Sachin Deo, Nariankadu Hemkumar, Younes Djadi, Nathan D. P. Buchanan
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AssigneeCirrus Logic, Inc.
InventorsTrenton Henry, Sachin Deo, Nariankadu Hemkumar, Younes Djadi, Nathan D. P. Buchanan
Estimating the term…
A system may include a plurality of processing cores including at least a first processing core and a second processing core, a shared memory communicatively coupled to and accessible by each of the plurality of processing cores, a global monitor communicatively coupled to each of the plurality of processing cores and configured to control exclusive accesses to memory by each of the plurality of processing cores, and a software architecture embodied in non-transitory computer-readable media and configured to, when read and executed by the multicore processor, partition a plurality of processing tasks between the first processing core and the second processing core.
A system comprising:
A method comprising, in a system having a plurality of processing cores including at least a first processing core and a second processing core and a shared memory communicatively coupled to and accessible by each of the plurality of processing cores:
Dependencies are inferred from the claim text.