Acceleration framework to chain IPU ASIC blocks
AssigneeIntel Corporation
InventorsJames R. Harris, Benjamin Walker
Life of this patent
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Abstract
A method is described. The method includes receiving a first invocation for a first ASIC block on a semiconductor chip. The first invocation provides a value. The method includes receiving a second invocation for a second ASIC block on the semiconductor chip. The second invocation also provides the value. The method includes determining that the second ASIC block is to operate on output from the first ASIC block from the first and second invocations having both provided the value. The method includes using a first device driver for the first ASIC block and a second device driver for the ASIC block to cause the second ASIC block to operate on the output from the first ASIC block.
Claims17
A non-transitory machine readable medium containing program code that when processed by a processor causes a method to be performed, the method comprising:
- receiving a first invocation for a first application specific integrated circuit (ASIC) block on a semiconductor chip, the first invocation providing a value;
- receiving a second invocation for a second ASIC block on the semiconductor chip, the second invocation also providing the value;
- determining that the second ASIC block is to operate on output from the first ASIC block from the first and second invocations having both provided the value;
- and
- using a first device driver for the first ASIC block and a second device driver for the second ASIC block to cause the second ASIC block to operate on the output from the first ASIC block, wherein the output of the first ASIC block is direct memory access (DMA) data and the second ASIC block is to encrypt the DMA data.
An apparatus, comprising:
- an infrastructure processing unit (IPU) having a processing core, a first application specific integrated circuit (ASIC) block and a second ASIC block;
- first device driver program code for the first ASIC block;
- second device driver program code for the second ASIC block;
- and
- framework program code to execute on the processing core, the framework program code to:
- receive a first invocation for the first device driver program code from a first layer of software, the first invocation including a value;
- receive a second invocation for the second device driver program code from a second layer of software, the second invocation including the value;
- determine that the second ASIC block is to operate on output from the first ASIC block based on the first and second invocations having included the value;
- and
- invoke the first and second device driver program codes to cause the second ASIC block to operate on the output from the first ASIC block, wherein the output of the first ASIC block is capable of being direct memory access (DMA) data and the second ASIC block is capable of being an encryption ASIC block to encrypt the DMA data.
A system, comprising:
- a plurality of host processing cores;
- a network;
- an infrastructure processing unit coupled in between the plurality of host processing cores and the network, the infrastructure processing unit comprising one or more infrastructure processing unit (IPU) processing cores, a first application specific integrated circuit (ASIC) block and a second ASIC block;
- first device driver program code for the first ASIC block to execute on at least one of the one or more IPU processing cores;
- second device driver program code for the second ASIC block to execute on at least one of the one or more IPU processing cores;
- and
- framework program code to execute on at least one of the one or more IPU processing core, the framework program code to:
- receive a first invocation for the first device driver program code from a first layer of software, the first invocation including a value;
- receive a second invocation for the second device driver program code from a second layer of software, the second invocation including the value;
- infer from the first and second invocations having included the value that the second ASIC block is to operate on output from the first ASIC block;
- and
- invoke the first and second device driver program codes to cause the second ASIC block to operate on the output from the first ASIC block, wherein the output of the first ASIC block is capable of being direct memory access (DMA) data and the second ASIC block is capable of being an encryption ASIC block to encrypt the DMA data.
Dependencies are inferred from the claim text.