Address mapping table for a memory sub-system using mixed translation unit sizes
AssigneeMicron Technology, Inc.
InventorLuca Bert
Life of this patent
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Abstract
A processing device in a memory sub-system receives a plurality of requests to write data to a non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size, and performs a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests.
Claims20
A system comprising:
- a volatile memory device;
- a non-volatile memory device;
- and
- a processing device, operatively coupled with the volatile memory device and the non-volatile memory device, to perform operations comprising:
- receiving, from a host system, a plurality of requests to write data to the non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size set by the host system;
- and
- performing a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests, and wherein a first translation unit size of the two or more different translation unit sizes is equal to the fixed size of the I/O chunks.
A method comprising:
- receiving, from a host system, a plurality of requests to write data to a non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size set by the host system;
- and
- performing a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests, and wherein a first translation unit size of the two or more different translation unit sizes is equal to the fixed size of the I/O chunks.
A computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- receiving, from a host system, a plurality of requests to write data to a non-volatile memory device, the plurality of requests comprising respective numbers of input/output (I/O) chunks of a fixed size set by the host system;
- and
- performing a plurality of write operations to write the data to the non-volatile memory device using respective translation units, wherein the respective translation units comprise two or more different translation unit sizes selected based on the respective numbers of I/O chunks of the plurality of requests, and wherein a first translation unit size of the two or more different translation unit sizes is equal to the fixed size of the I/O chunks.
Dependencies are inferred from the claim text.