Correctable error tracking and link recovery
AssigneeIntel Corporation
InventorsHao Wu, Tao Xu, Changpeng Guo, Hehe Li, Fengyi Zhang, Yanxin Zhao, Wenlong Zheng
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Abstract
An apparatus comprising a first processor comprising first circuitry to track correctable errors detected by a first communication device of a second processor; and second circuitry to communicate with the second processor to initiate, based on the tracked correctable errors, a link recovery procedure for the first communication device.
Claims22
An apparatus comprising:
- a first processor comprising:
- first circuitry to track correctable errors detected by a first communication device of a second processor;
- and
- second circuitry to communicate with the second processor to initiate, based on the tracked correctable errors, a link recovery procedure for the first communication device;
- wherein the first processor is to read information identifying the first communication device responsive to assertion of an error pin by the second processor, wherein the first processor is to read information identifying a second communication device responsive to a subsequent assertion of the error pin by the second processor.
A method comprising:
- counting correctable errors detected by a first communication device, wherein the correctable errors detected by the first communication device comprise correctable errors occurring at the first communication device and correctable errors occurring at one or more communication devices downstream of the first communication device;
- and
- initiating, based on the counted correctable errors, a link recovery procedure for the first communication device.
At least one non-transitory machine readable storage medium having instructions stored thereon, the instructions when executed by a machine to cause the machine to:
- determine a metric based on correctable errors detected by a first communication device, wherein the correctable errors detected by the first communication device comprise correctable errors occurring at the first communication device and correctable errors occurring at one or more communication devices downstream of the first communication device;
- and
- initiate, based on the metric, a link recovery procedure for the first communication device.
An apparatus comprising:
- a processor comprising:
- a first communication device to detect correctable errors, wherein the correctable errors detected by the first communication device comprise correctable errors occurring at the first communication device and correctable errors occurring at one or more communication devices downstream of the first communication device;
- and
- circuitry to perform a link recovery procedure for the first communication device based on a metric derived from the detected correctable errors.
Dependencies are inferred from the claim text.