US 12,754,788 B2 · Non-volatile memory switch with host isolation

Abstract

In a system with multiple host computers and one or more single-port non-volatile memory devices, a non-volatile memory switch receives memory transaction messages from different root complexes corresponding to the multiple host computers. Each of at least some of the memory transaction messages includes a host identifier that identifies a root complex from which the memory transaction was received. The non-volatile memory switch generates modified memory transaction messages at least by changing host identifiers within memory transaction messages to a common value indicative of a single root complex to present to the one or more single-port non-volatile memory devices the different root complexes as the single root complex. The non-volatile memory switch maintains associations of memory transaction messages with corresponding ones of the different root complexes, and sends the modified memory transaction messages to the one or more single-port non-volatile memory devices.

Claims22

Dependent claims

A method implemented by a non-volatile memory (NVM) switch that is configured to communicate with a plurality of host devices and a plurality of solid state drives (SSDs), the method comprising:

detecting, at the NVM switch, that a communication link between the NVM switch and a first host device, amongst the plurality of host devices, has gone down;
and
in response to detecting that the communication link between the NVM switch and the first host device has gone down, flushing, by the NVM switch, inflight memory access messages between the first host device and the plurality of SSDs while continuing to transfer memory access messages between i) one or more other host devices, amongst the plurality of host devices, and ii) the plurality of SSDs.

A non-volatile memory (NVM) switch that facilitates access by a plurality of host devices to a plurality of solid state drives (SSDs), the NVM switch comprising:

a first communication interface configured to transfer memory access messages between the NVM switch and the plurality of host devices;
a second communication interface configured to transfer memory access messages between the NVM switch and the plurality of SSDs;
and
control circuitry configured to:
determine that a communication link between the NVM switch and a first host device, amongst the plurality of host devices, has gone down, and
in response to determining that the communication link between the NVM switch and the first host device has gone down, flush inflight memory access messages between the first host device and the plurality of SSDs while the NVM switch continues to transfer memory access messages between i) one or more other host devices, amongst the plurality of host devices, and ii) the plurality of SSDs.

3 more elements

A non-transitory, computer-readable memory storing machine-readable instructions that, when executed by a processor of a non-volatile memory (NVM) switch, cause the processor to:

determine that a communication link between the NVM switch and a first host device, amongst a plurality of host devices communicatively coupled to the NVM switch, has gone down;
and
in response to determining that the communication link between the NVM switch and the first host device has gone down, control the NVM switch to flush inflight memory access messages between the first host device and a plurality of SSDs while the NVM switch continues to transfer memory access messages between i) one or more other host devices, amongst the plurality of host devices, and ii) the plurality of SSDs.

Dependencies are inferred from the claim text.

Non-volatile memory switch with host isolation

Life of this patent

Non-volatile memory switch with host isolation

Life of this patent

Abstract

Claims22