Bandwidth controlled data synchronization for image and vision processor
AssigneeTexas Instruments Incorporated
InventorsNiraj Nandan, Hetul Sanghvi, Mihir Narendra Mody
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AssigneeTexas Instruments Incorporated
InventorsNiraj Nandan, Hetul Sanghvi, Mihir Narendra Mody
Estimating the term…
Systems include data processors to process a set of image data in parallel, and thread schedulers coupled to the data processors. Each of the thread schedulers provides a respective task start signal for a respective data processor. Such systems also include a bandwidth controller coupled to one or more data processors. The bandwidth controller is configured to, for each of the data processor(s): maintain a respective token count, and determine whether to stall or propagate the respective task start signal from the respective thread scheduler to the data processor based on the respective token count. Other aspects include pattern adaptors respectively provided in the schedulers to allow mixing of multiple data patterns across blocks of data, transaction aggregators that allow re-using the same image data by multiple threads of execution while the image data remains in a given data buffer, and timers to detect failure and hang events.
A system comprising:
A system comprising:
Dependencies are inferred from the claim text.