Memory circuits with high security and methods for operating the same

A memory circuit, comprising:

• a memory array comprising a plurality of first memory cells and a plurality of second memory cells, wherein each of the plurality of first memory cells is configured to store a data bit, wherein the plurality of second memory cells are divided into a plurality of subsets, and wherein each of the subsets of second memory cells are associated with a corresponding one of the plurality of first memory cells, and are configured to store a plurality of repair bits, the plurality of repair bits indicating a location of the corresponding first memory cell in the memory array and a random bit that is unrelated with the data bit stored by the corresponding first memory cell;
• a compare circuit configured to provide a plurality of match signals based on comparing an address signal with the respective locations stored by the subsets of second memory cells;
• and
• a multiplexer configured to:
• output the random bit stored by the corresponding subset of second memory cells, in response to determining that a corresponding one of the match signals is equal to a first logic state;
• and
• output the data bit stored by the corresponding first memory cell, in response to determining that the corresponding match signal is equal to a second logic state.

A method for operating a memory circuit, comprising:

• providing a memory array including a first memory cell and a plurality of second memory cells, wherein the first memory cells is configured to store a data bit, and the plurality of second memory cells are configured to store first location information of the first memory cell in the memory array and store a random bit that is unrelated with the data bit;
• receiving an address signal indicating second location information of the first memory cell in the memory array;
• comparing the first location information with the second location information;
• and
• in response to determining that the first location information matches the second location information, outputting the random bit instead of the data bit.