Method of manufacturing electro-optical device
AssigneeSeiko Epson Corporation
InventorsShogo Takahashi, Kikuya Morita
Life of this patent
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Abstract
A method of manufacturing an electro-optical device includes the steps of: forming a recessed portion at an insulating member; forming a first capacitance electrode, a capacitance insulation film, and a second capacitance electrode along the recessed portion; concurrently patterning the first capacitance electrode, the capacitance insulation film, and the second capacitance electrode; removing a portion of the second capacitance electrode; forming an interlayer insulating film; and etching, until a portion of the first capacitance electrode is exposed in plan view, a region where the portion of the second capacitance electrode is removed, to form a contact hole penetrating through the interlayer insulating film and the capacitance insulation film.
Claims9
A method of manufacturing an electro-optical device, comprising:
- forming a recessed portion at an insulating member;
- forming a first capacitance electrode, a capacitance insulation film, and a second capacitance electrode along the recessed portion;
- concurrently patterning the first capacitance electrode, the capacitance insulation film, and the second capacitance electrode;
- removing a portion of the second capacitance electrode by using the capacitance insulation film as an etching stopper,
- forming an interlayer insulating film;
- and
- etching, at a region where the portion of the second capacitance electrode is removed, the interlayer insulating film and the capacitance insulation film concurrently until a portion of the first capacitance electrode is exposed in plan view, to form a first contact hole penetrating through the interlayer insulating film and the capacitance insulation film.
A method of manufacturing an electro-optical device, comprising:
- forming a recessed portion at an insulating member;
- forming a first capacitance electrode, a capacitance insulation film, and a second capacitance electrode along the recessed portion;
- concurrently patterning the first capacitance electrode, the capacitance insulation film, and the second capacitance electrode;
- removing a portion of the second capacitance electrode by using the capacitance insulation film as an etching stopper;
- forming a first interlayer insulating film so as to cover the second capacitance electrode and a portion of the capacitance insulation film exposed from the second capacitance electrode;
- after forming the first interlayer insulating film, forming a light shielding film at a position overlapping the recessed portion in plan view,
- forming a second interlayer insulating film so as to cover the light shielding film;
- forming a transistor at a position overlapping the light shielding film in plan view, and
- before forming a gate electrode of the transistor, etching, until a portion of the first capacitance electrode is exposed in plan view, a region where the portion of the second capacitance electrode is removed, to form a first contact hole penetrating through the second interlayer insulating film, the first interlayer insulating film, and the capacitance insulation film.
Dependencies are inferred from the claim text.