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US 12,751,299 B2Granted
Semiconductor device and semiconductor package including the same
AssigneeSamsung Electronics Co., Ltd.
InventorKiwon Baek
Life of this patent
Estimating the term…
Abstract
A semiconductor device and semiconductor package, the device including a lower semiconductor chip including a lower through-electrode; an interposer mounted on the lower semiconductor chip, the interposer including an interposer substrate; a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and electrically connected to the lower through-electrode; and at least one capacitor in the interposer substrate and electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes; and an upper semiconductor chip mounted on the interposer and electrically connected to the interposer through-electrode.
Claims20
A semiconductor device, comprising:
- a lower semiconductor chip including a lower through-electrode;
- an interposer mounted on the lower semiconductor chip, the interposer including:
- an interposer substrate, and
- a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and electrically connected to the lower through-electrode, wherein the interposer is free of active semiconductor devices;
- an upper semiconductor chip mounted on the interposer and electrically connected to the plurality of interposer through-electrodes;
- and
- at least one capacitor between the lower semiconductor chip and the upper semiconductor chip and electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes.
4 more elements
A semiconductor device, comprising:
- a base semiconductor chip including a base through-electrode;
- a first lower semiconductor chip mounted on the base semiconductor chip, the first lower semiconductor chip having a horizontal length less than a horizontal length of the base semiconductor chip, including a first lower through-electrode, and being electrically connected to the base through-electrode;
- a second lower semiconductor chip mounted on the first lower semiconductor chip, the second lower semiconductor chip including a second lower through-electrode electrically connected to the first lower through-electrode;
- an interposer mounted on the second lower semiconductor chip, the interposer including:
- an interposer substrate, and
- a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and being electrically connected to the second lower through-electrode, wherein the interposer is free of active semiconductor devices;
- a first upper semiconductor chip mounted on the interposer and including a first upper through-electrode electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes;
- a second upper semiconductor chip mounted on the first upper semiconductor chip;
- at least one capacitor between the second lower semiconductor chip and the first upper semiconductor chip and connected to at least one interposer through-electrode of the plurality of interposer through-electrodes;
- and
- a molding layer on the base semiconductor chip and surrounding the first lower semiconductor chip, the second lower semiconductor chip, the interposer, and the first upper semiconductor chip.
8 more elements
A semiconductor package, comprising:
- a package substrate;
- a base semiconductor chip mounted on the package substrate and having a base through-electrode;
- a lower semiconductor stack structure mounted on the base semiconductor chip, the lower semiconductor stack structure having a horizontal length less than a horizontal length of the base semiconductor chip and including a first lower semiconductor chip mounted on the base semiconductor chip and having a first lower through-electrode electrically connected to the base through-electrode, and a second lower semiconductor chip mounted on the first lower semiconductor chip and having a second lower through-electrode electrically connected to the first lower through-electrode;
- an interposer mounted on the lower semiconductor stack structure, the interposer including:
- an interposer substrate, and
- a plurality of interposer through-electrodes penetrating through at least a portion of the interposer substrate in a vertical direction and electrically connected to the second lower through-electrode, wherein the interposer is free of active semiconductor devices;
- an upper semiconductor stack structure mounted on the interposer and including a first upper semiconductor chip mounted on the interposer and electrically connected to the plurality of interposer through-electrodes, and a second upper semiconductor chip mounted on the first upper semiconductor chip;
- at least one capacitor between the lower semiconductor stack structure and the upper semiconductor stack structure and electrically connected to at least one interposer through-electrode of the plurality of interposer through-electrodes;
- and
- a molding layer on the base semiconductor chip and surrounding the lower semiconductor stack structure, the interposer, and the upper semiconductor stack structure,
- wherein the interposer further includes a redistribution pattern connecting the at least one capacitor to the at least one interposer through-electrode of the plurality of interposer through-electrodes.
8 more elements
Dependencies are inferred from the claim text.