Metallization stack and method of manufacturing the same, and electronic device including metallization stack

A metallization stack, comprising:

• at least one interconnection line layer and at least one via hole layer arranged alternately on a substrate, wherein at least one pair of adjacent an upper interconnection line layer and a via hole layer in the metallization stack comprises:
• an upper interconnection line in the upper interconnection line layer;
• and
• a via hole in the via hole layer,
• wherein the via hole layer is arranged closer to the substrate than the upper interconnection line layer,
• wherein at least part of the upper interconnection line extends longitudinally in a first direction, and a sidewall of the at least part of the upper interconnection line in the first direction is substantially coplanar with at least an upper portion of a corresponding sidewall of the via hole under the at least part of the upper interconnection line,
• wherein the metallization stack further comprises:
• a lower interconnection line layer that is closer to the substrate than the via hole layer and adjacent to the via hole layer, and
• wherein a part of a lower interconnection line in the lower interconnection line layer at least under the via hole extends longitudinally along a second direction intersecting the first direction, and a sidewall of the part of the lower interconnection line in the second direction is substantially coplanar with a lower portion of a corresponding sidewall of the via hole.