Transistor gate contacts and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Chiang, Chih-Hao Wang, Guan-Lin Chen, Yu-Xuan Huang, Jin Cai
Life of this patent
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Abstract
In an embodiment, a device includes: a lower source/drain region; an upper source/drain region; a nanostructure between the upper source/drain region and the lower source/drain region; a gate structure extending into a sidewall of the nanostructure, the gate structure including a gate dielectric and a gate electrode, an outer sidewall of the gate electrode being aligned with an outer sidewall of the gate dielectric; and a gate contact adjacent the gate structure, the gate contact extending along the outer sidewall of the gate electrode and the outer sidewall of the gate dielectric.
Claims20
A method comprising:
- forming a nanostructure between a first gate spacer and a second gate spacer, the first gate spacer disposed above the nanostructure, the second gate spacer disposed below the nanostructure;
- forming a sidewall recess by recessing a sidewall of the nanostructure from a sidewall of the first gate spacer and from a sidewall of the second gate spacer;
- forming a gate structure in the sidewall recess and on the sidewall of the nanostructure;
- depositing an inter-layer dielectric around the gate structure;
- and
- forming a gate contact through the inter-layer dielectric to contact a sidewall of the gate structure.
A method comprising:
- forming a sidewall recess in a nanostructure by recessing a sidewall of the nanostructure;
- forming a gate structure in the sidewall recess and on the sidewall of the nanostructure;
- depositing an inter-layer dielectric around the gate structure;
- forming a gate contact through the inter-layer dielectric to contact a sidewall of the gate structure;
- and
- forming a contact mask on a top surface of the gate contact, a top surface of the contact mask being coplanar with a top surface of the inter-layer dielectric.
A method comprising:
- forming a first source/drain region above a nanostructure;
- forming a sidewall recess in the nanostructure;
- forming a gate structure in the sidewall recess, the gate structure comprising a gate dielectric and a gate electrode, an outer sidewall of the gate electrode being aligned with an outer sidewall of the gate dielectric;
- forming a gate contact adjacent the gate structure, the gate contact extending along the outer sidewall of the gate electrode and the outer sidewall of the gate dielectric;
- and
- after forming the gate contact, forming a second source/drain region below the nanostructure.
Dependencies are inferred from the claim text.