Method and IC design with non-linear power rails
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSheng-Hsiung Wang, Tung-Heng Hsieh, Bao-Ru Young
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsSheng-Hsiung Wang, Tung-Heng Hsieh, Bao-Ru Young
Estimating the term…
The present disclosure provides a method for fabricating an integrated circuit (IC). The method includes receiving an IC layout having a first pattern layer that includes first source/drain (S/D) contacts and second S/D contacts, the first and second S/D contacts are spaced away from each other by a spacing along a first direction, and each of the first and second S/D contacts have elongated shapes extending lengthwise in a second direction perpendicular to the first direction. The method includes constructing a conductive feature on a second pattern layer of the IC layout, the conductive feature having an initial rectangular shape with a length and a width, the length extending along the first direction. And the method includes modifying the conductive feature to form a modified conductive feature that is overlapped with the first S/D contacts and distanced away from the second S/D contacts.
A semiconductor structure, comprising:
A semiconductor structure, comprising:
A semiconductor structure, comprising:
Dependencies are inferred from the claim text.