Semiconductor substrate, method for producing semiconductor substrate, semiconductor substrate production device, electronic component, and electronic device
AssigneeKYOCERA Corporation
InventorsTakeshi Kamikawa, Katsuaki Masaki, Yuichiro Hayashi, Toshihiro Kobayashi
Life of this patent
Estimating the term…
Abstract
A semiconductor substrate includes a base substrate, a mask layer including an opening portion and a mask portion, and a GaN-based semiconductor layer that includes a GaN-based semiconductor. The GaN-based semiconductor layer includes: a first portion located on the mask portion; and a second portion that is located on the opening portion and has a lower dislocation density of non-threading dislocations in a cross section of the GaN-based semiconductor layer taken along a thickness direction than the first portion.
Claims20
A semiconductor substrate comprising:
- a base substrate;
- a mask layer that is located on the base substrate, and comprises a first opening portion and a mask portion;
- and
- a first semiconductor layer that comprises a GaN-based semiconductor located over the base substrate exposed through the first opening portion and over the mask portion,
- wherein the first semiconductor layer comprises:
- a first portion located on the mask portion, and
- a second portion that is located on the first opening portion and has a lower dislocation density of non-threading dislocations in a cross section of the first semiconductor layer taken along a thickness direction than the first portion,
- wherein the first portion comprises:
- a third portion located on the mask portion, and
- a fourth portion located closer to an upper surface of the first semiconductor layer than the third portion, and the fourth portion comprising a different impurity concentration from the third portion, and
- wherein an upper surface of the third portion comprises an incline with respect to the upper surface of the first semiconductor layer.
A semiconductor substrate comprising:
- a base substrate;
- a mask layer that is located on the base substrate, and comprises a first opening portion and a mask portion;
- and
- a first semiconductor layer that comprises a GaN-based semiconductor located over the base substrate exposed through the first opening portion and over the mask portion, wherein
- the first semiconductor layer comprises a first portion located on the mask portion,
- wherein the first portion comprises non-threading dislocations,
- wherein a threading dislocation density in the first portion is 5×106/cm2 or lower,
- wherein the first portion comprises:
- a third portion located on the mask portion, and
- a fourth portion located closer to an upper surface of the first semiconductor layer than the third portion, the fourth portion has a non-threading dislocation density lower than the third portion, and the fourth portion has a different impurity concentration from the third portion, and
- wherein an upper surface of the third portion is inclined with the upper surface of the first semiconductor layer.
A method for producing a semiconductor substrate comprising:
- preparing a template substrate comprising a base substrate and a mask layer that is located above the base substrate and comprises an opening portion and a mask portion;
- and
- forming a first portion that is located on the mask portion and comprises a GaN-based semiconductor, and a second portion that is located on the opening portion and comprises a GaN-based semiconductor, with a dislocation density of non-threading dislocations being lower in a cross section of the second portion taken along a thickness direction than in a cross section of the first portion taken along the thickness direction,
- wherein the first portion comprises:
- a third portion located on the mask portion, and
- a fourth portion located closer to an upper surface of the first semiconductor layer than the third portion, and the fourth portion comprising a different impurity concentration from the third portion, and
- wherein an upper surface of the third portion comprises an incline with respect to the upper surface of the first semiconductor layer after the forming.
Dependencies are inferred from the claim text.