Semiconductor device with self-selecting memory layer

A semiconductor device comprising at least one memory cell, the at least one memory cell comprising:

• a first electrode layer;
• a second electrode layer separated from the first electrode layer, wherein the first and second electrode layers are coupled to receive a voltage applied to the first and second electrode layers;
• and
• a self-selecting memory layer interposed between the first electrode layer and the second electrode layer and configured to store data and operable to disconnect or connect a conducting path between the first electrode layer and the second electrode layer, to respond to the voltage applied to the first and second electrode layers,
• wherein the self-selecting memory layer is formed as a single insulating material layer doped with a first dopant and a second dopant,
• wherein the first dopant includes one or more elements to create a shallow trap having an energy level capable of providing a path for conductive carriers in the insulating material layer, and the second dopant is movable in the insulating material layer according to a polarity of the voltage applied to the first and second electrode layers,
• wherein the first dopant includes at least one of aluminum (Al), lanthanum (La), niobium (Nb), vanadium (V), tantalum (Ta), tungsten (W), chromium (Cr), molybdenum (Mo), boron (B), nitrogen (N), carbon (C), phosphorus (P), arsenic (As), titanium (Ti), copper (Cu), zirconium (Zr), hafnium (Hf), or a combination of two or more of aluminum (Al), lanthanum (La), niobium (Nb), vanadium (V), tantalum (Ta), tungsten (W), chromium (Cr), molybdenum (Mo), boron (B), nitrogen (N), carbon (C), phosphorus (P), arsenic (As), titanium (Ti), copper (Cu), zirconium (Zr), or hafnium (Hf).