Structure and formation method of semiconductor device with power rail

A method for forming a semiconductor device structure, comprising:

• forming a fin structure over a substrate;
• forming a sacrificial structure beside the fin structure, wherein a bottom surface of the fin structure is vertically between a top of the sacrificial structure and a bottom of the sacrificial structure;
• forming an epitaxial structure on the fin structure, wherein the top of the sacrificial structure is vertically between the bottom surface of the fin structure and a bottom of the epitaxial structure;
• forming a dielectric layer over the epitaxial structure and the sacrificial structure;
• partially removing the dielectric layer to form a contact opening, wherein the contact opening exposes an upper slanted surface of the epitaxial structure, a lower slanted surface of the epitaxial structure, and the sacrificial structure;
• forming a conductive contact at least partially covering the epitaxial structure and the sacrificial structure, wherein the conductive contact is formed after the epitaxial structure is formed, the conductive contact has a bottommost surface, a first sidewall, and a second sidewall opposite to the first sidewall, and the bottommost surface adjoins the first sidewall and the second sidewall;
• exposing a bottom of the sacrificial structure after the conductive contact is formed;
• removing the sacrificial structure from the bottom of the sacrificial structure to form a trench exposing the conductive contact;
• and
• forming a conductive structure in the trench, wherein the conductive structure is formed after the epitaxial structure is formed, and the conductive structure has a third sidewall substantially aligned with the first sidewall of the conductive contact, and the conductive structure laterally extends across the second sidewall of the conductive contact.

A semiconductor device structure, comprising:

• a semiconductor fin over a substrate;
• an epitaxial structure on the semiconductor fin;
• a conductive contact electrically connected to the epitaxial structure, wherein the conductive contact has a bottommost surface, a first sidewall, and a second sidewall opposite to the first sidewall, and the bottommost surface adjoins the first sidewall and the second sidewall;
• an isolation structure laterally surrounding the semiconductor fin, wherein the isolation structure has a portion positioned beside the conductive contact;
• and
• a conductive structure continuously extending from a bottom surface of the substrate towards the conductive contact and reaching the conductive contact and an interface between the conductive contact and the portion of the isolation structure, wherein the conductive structure is electrically connected to the conductive contact, and a topmost surface of the conductive structure is vertically positioned between a bottom of the first fin structure and an interface between the first fin structure and the epitaxial structure, wherein a portion of the conductive contact is vertically between the epitaxial structure and a top of the conductive structure and laterally between the semiconductor fin and an outermost edge of the epitaxial structure, wherein the conductive structure has a third sidewall and a fourth sidewall opposite to the third sidewall, the third sidewall is substantially aligned with the first sidewall of the conductive contact, and the second sidewall of the conductive contact is laterally between the third sidewall and the fourth sidewall of the conductive structure.