A method for manufacturing a semiconductor metal-insulator-metal (MIM) capacitor device, comprising:
- providing a substrate, wherein an MIM-capacitor region and a non-MIM-capacitor region are defined on the substrate;
- forming a bottom electrode layer and a first dielectric layer sequentially on the substrate, wherein the bottom electrode layer and the first dielectric layer are both disposed in the MIM-capacitor region and the non-MIM-capacitor region;
- performing patterning by applying a first mask in the first dielectric layer to form a through hole of MIM-capacitor and through holes for conductive plugs, wherein the through hole of MIM-capacitor is disposed in the MIM-capacitor region, wherein the through holes for conductive plugs are disposed in the non-MIM-capacitor region, wherein and the bottom electrode layer is partially exposed by the through hole of MIM-capacitor and the through holes for conductive plugs;
- forming an interconnection metal layer and a second dielectric layer sequentially, wherein the interconnection metal layer comprises a first portion and a second portion, wherein the first portion of the interconnection metal layer is disposed on a surface of the through hole of MIM-capacitor and comprises a first recess region recessed towards the through hole of MIM-capacitor, wherein the second portion of the interconnection metal layer fills the through holes for conductive plugs to form conductive plugs, wherein the second dielectric layer is disposed on a surface of the interconnection metal layer;
- and wherein the interconnection metal layer and the second dielectric layer partially fill the through hole of MIM-capacitor, such that the second dielectric layer comprises a second recess region recessed towards the first recess region;
- wherein the first recess region of the interconnection metal layer and the second recess region of the second dielectric layer are formed to have trapezoidal cross-sections, with their openings larger than their respective bottom surfaces;
- performing a surface planarization treatment to remove the interconnection metal layer and the second dielectric layer that are outside the through hole of MIM-capacitor and the through holes for the conductive plugs;
- and
- after the surface planarization treatment, forming an upper metal layer and patterning the upper metal layer by using a second mask, wherein, after the patterning, the upper metal layer comprises a first portion and a second portion, wherein the first portion of the upper metal layer is disposed on a surface of the second dielectric layer, and the second portion of the upper metal layer is disposed on surfaces of the conductive plugs, wherein the first portion of the interconnection metal layer, the second dielectric layer, and the first portion of the upper metal layer constitute the MIM capacitor, and wherein the first portion of the upper metal layer and the second portion of the upper metal layer are electrically isolated from each other;
- wherein after two mask processes, the first portion of the interconnection metal layer serves as a recessed lower plate of the MIM capacitor, and the first portion of the upper metal layer serves as an upper plate of the MIM capacitor.