Semiconductor device having units that output predetermined signal values in defined positions relative to units that output signals in response to pixel outputs

A semiconductor device comprising:

• a plurality of first signal generation units arranged so as to form a plurality of rows and a plurality of columns and corresponding to a plurality of pixels configured to output a signal in response to incidence of light, each of the plurality of first signal generation units being configured to output a first digital signal in response to an output from a corresponding pixel;
• a plurality of second signal generation units arranged corresponding to at least a part of the plurality of rows and the plurality of columns, each of the plurality of second signal generation units being configured to output a second digital signal having a predetermined digital value;
• and
• a readout circuit configured to output a signal based on at least one of the first digital signal and the second digital signal that is output from a selected part of the plurality of first signal generation units and the plurality of second signal generation units,
• wherein at least one of the plurality of second signal generation units is provided between the plurality of first signal generation units and an end of a chip provided with the plurality of first signal generation units,
• wherein the second digital signal has a plurality of bits, and
• wherein all of the plurality of bits are at the same level.

A semiconductor device comprising:

• a plurality of first signal generation units arranged so as to form a plurality of rows and a plurality of columns and corresponding to a plurality of pixels configured to output a signal in response to incidence of light, each of the plurality of first signal generation units being configured to output a first digital signal in response to an output from a corresponding pixel;
• a plurality of second signal generation units arranged corresponding to at least a part of the plurality of rows and the plurality of columns, each of the plurality of second signal generation units being configured to output a second digital signal having a predetermined digital value;
• and
• a readout circuit configured to output a signal based on at least one of the first digital signal and the second digital signal that is output from a selected part of the plurality of first signal generation units and the plurality of second signal generation units,
• wherein at least one of the plurality of second signal generation units is provided between the plurality of first signal generation units and an end of a chip provided with the plurality of first signal generation units, and
• wherein each of the plurality of second signal generation units generates the second digital signal based on a count number of pulses included in a control signal that is input.